Johannes Knorr

Speed-enhanced OEIC with area-efficient charge pump and shunt regulator

The bandwidth of the photodiode in an optoelectronic integrated circuit with a single 5 V supply is extended from 20MHz to 771MHz by an innovative on-chip voltage-up-converter. A shunt-regulator keeps the die are small and exploits breakdown voltages of available devices best. Rise and fall times below 0.5ns are achieved allowing operation at data rates in excess of 1Gbits/s. A possible receiver sensitivity of -22.5 dBm is obtained for a wavelength of 670nm.

Comparison of CMOS and BiCMOS optical receiver SoCs

Currently two very interesting trends in design of optical receivers can be observed. The first is to realize optical receivers in deep-sub-μm CMOS technology and to integrate them in analog-digital systems-on-a-chip (SoC). The second even much more innovative trend is to integrate voltage-up-converters (VUCs) in optoelectronic integrated circuits (OEICs) to increase the bandwidth and data rate, whereby only the chip voltage supply is necessary. The properties of deep-sub-µm CMOS optical receivers and of sub-μm OEICs with respect to current consumption, noise, and chip area will be compared. For both trends a new design each and measured results will be presented. The first example is a burst-mode receiver in digital 0.18μm CMOS technology with sensitivities better than -28 dBm and -22 dBm at data rates of 622Mb/s and 1.25Gb/s, respectively, for a bit error rate of 10-10 each. These values compare to sensitivities of -24.5 dBm and -24.1 dBm, respectively, of a 0.6μm BiCMOS OEIC. For implementation of the burst-mode receiver in an analog-digital SoC, a differential circuit is chosen. Another example is an OEIC in 0.6μm BiCMOS technology with an integrated VUC, which generates a bias voltage of 16V for the integrated photodiode from the chip supply voltage of 5V. Due to the VUC, the data rate for the given technology is increased from 50Mb/s to 1.5Gb/s. The dependence of the receiver sensitivity and of the maximum photocurrent on the VUC clock-frequency will be shown. The VUC-OEIC represents a complete SoC consisting of sensor, analog and digital part. Aspects of substrate noise coupling from the digital part into the photodiode and amplifier are discussed.

A 2.4GHz-bandwidth OEIC with voltage-up-converter [optical receiver]

This work describes a realisation of an optoelectronic integrated circuit (OEIC) with an integrated voltage-up-converter (VUC) to enhance the frequency response of an integrated pin photodiode. The VUC produces a voltage of 11 V and improves the bandwidth of the OEIC from 1.5 GHz to 2.4 GHz for a single 5 V supply without any additional external components. For a maximum measured data rate of 3 Gbps and a bit error rate of 10/sup -9/ a sensitivity of -24.3 dBm at a wavelength of 660 nm is obtained. The OEIC is implemented in a modified 0.6 /spl mu/m silicon BiCMOS technology with f/sub T/=25 GHz.

New methods for bandwidth enhancement of integrated high-sensitivity optical receivers

Optoelectronic integrated circuits (OEICs) offering high bandwidth and high sensitivity as well are needed for the pickups of optical storage systems of the next generation, such as Blu-Ray or HDDVD. High bandwidth is necessary to enable high data transfer rates between the disk and the processing device, and high sensitivity allows to operate at low optical power and to deal with the lower efficiency of the photodiodes for blue light. Two methods will be presented to increase the bandwidth of the OEIC while maintaining high sensitivity. The first approach reduces the parasitic capacitance by placing the feedback resistor in a low-doped region. By this way the parasitic capacitance of the resistor is combined in series with the small depletion-layer capacitance of the low-doped region, which results in a drastically reduced effective capacitance. Using this method the 3dB-frequency of a standard one-stage transimpedance amplifier is increased by 55% from 67MHz to 104MHz. In the second approach the feedback resistor is replaced by a network that consists of two resistive voltage dividers that are coupled via a capacitor. Using such a capacitive-coupled voltage divider (CCVD) the feedback path is split into a low- and a high-frequency path and the effective band-limiting RC-constant is reduced. A bandwidth of 378MHz could be achieved. With a measured transimpedance of 212kΩ this results in a GBW of 80.3THzΩ.

Speed-enhanced integrated optical sensor with area-reduced regulated-voltage up-converter

The bandwidth of the photodiode in an optoelectronic integrated sensor circuit with a single 5-V supply is increased from 20 to 770 MHz by an on-chip voltage up-converter. A shunt-regulator is implemented to keep the die area small and to best exploit the breakdown voltages of available devices. Rise and fall times below 0.49 ns are achieved enabling operation at data rates in excess of 1 Gbit/s. A possible receiver sensitivity of -22.5 dBm results for a wavelength of 670 nm with an additional external capacitor of 10 nF. Without an external capacitor, a sensitivity of -22.15 dBm is obtained.

Sensitivity-enhanced OEIC with capacitance multiplier for reduced lower-cutoff frequency

A BiCMOS optoelectronic integrated circuit for the use in future optical storage systems is presented. In this approach a PIN photodiode is integrated together with the transimpedance amplifier (TIA). The amplifier consists of two branches, connected via common current source. Thereby it is possible to realize differential outputs and to double the overall transimpedance of the circuit. In order to adhere this doubling effect down to deep frequencies, we, in addition, present an active capacitance multiplier which is used to realize high capacitance values with a minimum of area consumption. The measurement results of the OEIC showed a differential transimpedance of 84k/spl Omega/ and a -3dB bandwidth of 500MHz.

A 2.5-Gb/s Receiver PDIC With Low-Noise Integrated Charge Pump

A single-chip optical receiver with integrated voltage-up-converter for speed enhancement of the photodiode in a 0.6-mum silicon BiCMOS technology with ft=25 GHz is presented. It incorporates a vertical p-i-n photodetector with responsivities of 0.36 and 0.26 A/W at 660 and 850 nm, respectively. Using an on-chip low-noise charge pump (CP; VOUT=12 V) at a bit rate of 2.5 Gb/s and a bit error rate of 10-9, sensitivities of -23.5 and -21.2 dBm are obtained for 660 and 850 nm, respectively. The basics of the current-driven regulated low-noise CP are presented

Single-stage transimpedance amplifier for advanced DVD systems

For digital versatile disk (DVD) applications, amplifiers with high bandwidth and high sensitivity in the red spectral range are required. The presented optoelectronic integrated circuit (OEIC) achieves a bandwidth of 265MHz and a transimpedance of 210kΩ due to an advanced feedback network. This is an improvement by a factor of 4 compared to the same amplifier with a simple feedback resistor.

Investigation of optoelectronic integrated circuit speed in dependence on charge-pump stage count

An optoelectronic integrated circuit (OEIC), consisting of a photodiode for wavelengths up to 850 nm and a transimpedance amplifier, is introduced together with a voltage-up-converter to reduce the response time of the photodiode by increasing its reverse voltage. Depending on the stage count of the Dickson-type voltage converter, the bandwidth can be increased by factors of 10 to 30. This improvement is due to the elimination of slow carrier diffusion in the photodiode. Bandwidth, rise and fall times, eye diagram, as well as voltage converter characteristics are given for OEICs realized in a 0.6-µm bipolar CMOS (BiCMOS) process.