John D. Villasenor

Wavelet filter evaluation for image compression

Choice of filter bank in wavelet compression is a critical issue that affects image quality as well as system design. Although regularity is sometimes used in filter evaluation, its success at predicting compression performance is only partial. A more reliable evaluation can be obtained by considering an L-level synthesis/analysis system as a single-input, single-output, linear shift-variant system with a response that varies according to the input location module (2(L),2(L)). By characterizing a filter bank according to its impulse response and step response in addition to regularity, we obtain reliable and relevant (for image coding) filter evaluation metrics. Using this approach, we have evaluated all possible reasonably short (less than 36 taps in the synthesis/analysis pair) minimum-order biorthogonal wavelet filter banks. Of this group of over 4300 candidate filter banks, we have selected and present here the filters best suited to image compression. While some of these filters have been published previously, others are new and have properties that make them attractive in system design.

Selective avoidance of cycles in irregular LDPC code construction

This letter explains the effect of graph connectivity on error-floor performance of low-density parity-check (LDPC) codes under message-passing decoding. A new metric, called extrinsic message degree (EMD), measures cycle connectivity in bipartite graphs of LDPC codes. Using an easily computed estimate of EMD, we propose a Viterbi-like algorithm that selectively avoids small cycle clusters that are isolated from the rest of the graph. This algorithm is different from conventional girth conditioning by emphasizing the connectivity as well as the length of cycles. The algorithm yields codes with error floors that are orders of magnitude below those of random codes with very small degradation in capacity-approaching capability.

adaptive mobile multimedia networks

The authors consider a networking environment in which the users are mobile, the topology changes, code division multiple access (CDMA) provides multiple wireless channels, the bandwidth of a given link is unpredictable and possibly very low, the error rates are extremely high and variable, major interference occurs when multiple transmissions take place over (possibly different) links on the same or different codes, real-time multimedia traffic must be supported as well as datagram traffic, there is no stable communication infrastructure, and there is no central control. They consider the problem of developing a design prototyping methodology, performance evaluation techniques, and networking algorithms to support a rapidly deployable radio network for such an environment. The network must be capable of providing guaranteed quality of service (QoS) to real-time multimedia traffic in a mobile, wireless, multihop radio network with no fixed infrastructure (e.g., no base stations). Another element of the environment with which they deal is that of multihop communications. They focus on two layers of key importance in multimedia wireless network design, namely compression algorithms and adaptivity in the voice/video applications layer, and network algorithms at the wireless subnet layer. Simulation tools are used to evaluate our design as well as to provide a path toward their implementation in software.

Construction of irregular LDPC codes with low error floors

This work explains the relationship between cycles, stopping sets, and dependent columns of the parity check matrix of low-density parity-check (LDPC) codes. Furthermore, it discusses how these structures limit LDPC code performance under belief propagation decoding. A new metric called extrinsic message degree (EMD) measures cycle connectivity in bipartite graph. Using an easily computed estimate of EMD, we propose a Viterbi-like algorithm that selectively avoids cycles and increases stopping set size. This algorithm yields codes with error floors that are orders of magnitude below those of girth-conditional codes.

Stack-run image coding

We describe a new image coding approach in which a 4-ary arithmetic coder is used to represent significant coefficient values and the lengths of zero runs between coefficients. This algorithm works by raster scanning within subbands, and therefore involves much lower addressing complexity than other algorithms such as zerotree coding that require the creation and maintenance of lists of dependencies across different decomposition levels. Despite its simplicity, and the fact that these dependencies are not explicitly utilized, the algorithm presented here is competitive with the best enhancements of zerotree coding. In addition, it performs comparably with adaptive subband splitting approaches that involve much higher implementation complexity.

Gaussian random number generators

Rapid generation of high quality Gaussian random numbers is a key capability for simulations across a wide range of disciplines. Advances in computing have brought the power to conduct simulations with very large numbers of random numbers and with it, the challenge of meeting increasingly stringent requirements on the quality of Gaussian random number generators (GRNG). This article describes the algorithms underlying various GRNGs, compares their computational requirements, and examines the quality of the random numbers with emphasis on the behaviour in the tail region of the Gaussian probability density function.

Dealing with Loud Neighbors: The Benefits and Tradeoffs of Adaptive Femtocell Access

Femtocells are low-power, very small-service-area (e.g. home or office environment) cellular base stations that will significantly impact the cellular landscape in the next several years. One of the most important open technical issues related to femtocells concerns the impact on system performance of different policies regarding who is allowed to connect to a femtocell. In the present paper, interaction between mobile stations (MS) that are near to, but not necessarily communicating with, femtocells is explored. It is shown that an adaptive femtocell access policy that takes specific account of the instantaneous loads on the network can lead to improved performance over a completely open, or completely closed approach.

Secure Arithmetic Coding

Although arithmetic coding offers extremely high coding efficiency, it provides little or no security as traditionally implemented. We present a modified scheme that offers both encryption and compression. The system utilizes an arithmetic coder in which the overall length within the range [0,1) allocated to each symbol is preserved, but the traditional assumption that a single contiguous interval is used for each symbol is removed. Additionally, a series of permutations are applied at the input and the output of the encoder. The overall system provides simultaneous encryption and compression, with negligible coding efficiency penalty relative to a traditional arithmetic coder

Joint turbo decoding and estimation of hidden Markov sources

We describe a joint source-channel scheme for modifying a turbo decoder in order to exploit the statistical characteristics of hidden Markov sources. The basic idea is to treat the trellis describing the hidden Markov source as another constituent decoder which exchanges information with the other constituent decoder blocks. The source block uses as extrinsic information the probability of the input bits that is provided by the constituent decoder blocks. On the other hand, it produces a new estimation of such a probability which will be used as extrinsic information by the constituent turbo decoders. The proposed joint source-channel decoding technique leads to significantly improved performance relative to systems in which source statistics are not exploited and avoids the need to perform any explicit source coding prior to transmission. Lack of a priori knowledge of the source parameters does not degrade the performance of the system, since these parameters can be jointly estimated with turbo decoding.

A hardware Gaussian noise generator using the Box-Muller method and its error analysis

We present a hardware Gaussian noise generator based on the Box-Muller method that provides highly accurate noise samples. The noise generator can be used as a key component in a hardware-based simulation system, such as for exploring channel code behavior at very low bit error rates, as low as 10-12 to 10-13. The main novelties of this work are accurate analytical error analysis and bit-width optimization for the elementary functions involved in the Box-Muller method. Two 16-bit noise samples are generated every clock cycle and, due to the accurate error analysis, every sample is analytically guaranteed to be accurate to one unit in the last place. An implementation on a Xilinx Virtex-4 XC4VLX100-12 FPGA occupies 1,452 slices, three block RAMs, and 12 DSP slices, and is capable of generating 750 million samples per second at a clock speed of 375 MHz. The performance can be improved by exploiting concurrent execution: 37 parallel instances of the noise generator at 95 MHz on a Xilinx Virtex-II Pro XC2VP100-7 FPGA generate seven billion samples per second and can run over 200 times faster than the output produced by software running on an Intel Pentium-4 3 GHz PC. The noise generator is currently being used at the Jet Propulsion Laboratory, NASA to evaluate the performance of low-density parity-check codes for deep-space communications