John Keys

Improved device driver reliability through hardware verification reuse

Faulty device drivers are a major source of operating system failures. We argue that the underlying cause of many driver faults is the separation of two highly-related tasks: device verification and driver development. These two tasks have a lot in common, and result in software that is conceptually and functionally similar, yet kept totally separate. The result is a particularly bad case of duplication of effort: the verification code is correct, but is discarded after the device has been manufactured; the driver code is inferior, but used in actual device operation. We claim that the two tasks, and the software they produce, can and should be unified, and this will result in drastic improvement of device-driver quality and reduction in the development cost and time to market. In this paper we propose a device driver design and verification workflow that achieves such unification. We apply this workflow to develop and test drivers for four different I/O devices and demonstrate that it improves the driver test coverage and allows detecting driver defects that are extremely hard to find using conventional testing techniques.

Direct data flows

Reducing power consumption of Mobile Internet Devices (MID) and smartphones is critical as battery life is a key feature for mobility. Most vendors use System-On-Chip designs integrating more and more fixed-function hardware modules in a bid to reduce power consumption. On the other hand the explosion of new applications has increased the demand for PC-like processing capabilities on these devices. They are best supported by general purpose CPUs and Operating Systems which consume more power. Traditional system architectures focus on a data transfer model with the CPU as one of the endpoints. Consequently there are numerous usage scenarios where the general purpose CPU just acts as an intermediary between hardware modules, transferring data from a hardware module to memory and vice-versa. We propose Direct Data Flows, an SoC focused system architecture where the OS can configure fixed-function hardware modules to communicate data directly with each other. This eliminates unnecessary data hops and reduces CPU interrupts allowing the general purpose CPU to be opportunistically brought into lower power states, reducing overall power consumption. We have created a prototype Direct Data Flow setup for network file downloads which demonstrates up to 65% energy savings for typical file sizes.