John M. Espinosa-Duran
University of Valle
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Publication
Featured researches published by John M. Espinosa-Duran.
africon | 2007
John M. Espinosa-Duran; Jaime Velasco-Medina; Gloria Huertas; Raoul Velasco; J.L. Huertas
This paper studies the effects produced by radiation single event transient (SET) injected in the transistors of a custom operational amplifier, in order to evaluate their sensitivity to the radiation transient faults. A BID (built-in detector), was included in the circuit in order to amplify and detect the SETs effect. The circuit was designed using a non-rad- hard AMS-CMOS 0.8 mum process. In this case, simulation results allow the identification of the operational amplifier most sensitive transistors and the operating conditions during which the worst effects in the operational amplifier response were produced.
latin american symposium on circuits and systems | 2011
José F. Rivera-Miranda; Álvaro J. Caicedo-Beltrán; Juan D. Valencia-Payán; John M. Espinosa-Duran; Jaime Velasco-Medina
The Quantum Fourier Transform (QFT) has an important role in some of the most interesting and useful quantum algorithms, such as those for period finding, order finding, phase estimation and factoring. Most of the research carried out on the QFT has been developed using software simulators, however these do not emulate efficiently the quantum parallelism present in the quantum algorithms. Addressing this problem, this paper presents the hardware design of an emulator for computing the QFT using FPGAs. This emulator was designed considering a modular philosophy and it is expected to be a powerful tool to evaluate quantum algorithms that include a many-qubit QFT.
latin american symposium on circuits and systems | 2013
Gianluca Forte; John M. Espinosa-Duran; Jaime Velasco-Medina
This paper presents the design of two systolic architectures to evaluate polynomials of degree n considering the Horners rule. The systolic arrays are based on processing elements that process normalized and non-normalized data. The designed architectures are flexible, parameterized and described by using VHDL. This allows achieving a good trade-off between area, performance and flexibility. The synthesis results show that the proposed architectures can be used as coprocessors for high performance reconfigurable computing.
symposium on integrated circuits and systems design | 2007
John M. Espinosa-Duran; Jaime Velasco-Medina; Gloria Huertas; J.L. Huertas
This paper studies long-term effects produced by ionizing radiation in a switched-capacitor filter, using the oscillation based test (OBT) approach by Huertas et al. (2006). In this case, threshold voltage shifting is considered as one of the major concerning effects produced by total ionizing dose (TID). Simulation results show that the OBT approach is very well suited for detection of faulty filters.
latin american test workshop - latw | 2010
John M. Espinosa-Duran; Vladimir Trujillo-Olaya; Jaime Velasco-Medina
This paper presents two strategies to inject bit-flips in FSMs modeled in VHDL behavioral level. The dependability validation to SEUs or MEUs into the FSM flip flops is carried out by means of minor modifications on the VHDL description. The simulation results show that the proposed strategies have a low area overhead, allow synchronous and asynchronous fault injection and are very suitable to carry out the dependability validation step on FSMs.
latin american test workshop - latw | 2010
Vladimir Trujillo-Olaya; John M. Espinosa-Duran; Jaime Velasco-Medina
This paper presents the results of the dependability validation of a cryptoprocessor to SEU effects. The dependability validation was carried out running a testbench, initially using functional simulation, and later using in-system hardware execution. For the fault injection, a modified memory cell and a strategy of pseudorandom generation of states into FSMs are proposed. The testbench was simulated using Modelsim, and was executed on the FPGA EP2S601020C4 and the results are observed using an Embedded Logic Analyzer. The simulation and experimental results show that registers and FSMs require to be hardened in order to warrantee the correct operation of the cryptoprocessor, also the in-system hardware execution of the testbench allows to speed up more than 1000 times the dependability validation step.
international conference on electronics, circuits, and systems | 2007
John M. Espinosa-Duran; Jaime Velasco-Medina; Gloria Huertas; J.L. Huertas
This paper studies long-term effects produced by ionizing radiation in a switched-capacitor filter, using the oscillation based test (OBT) approach by Huertas et al. (2006). In this case, threshold voltage shifting is considered as one of the major concerning effects produced by total ionizing dose (TID). Simulation results show that the OBT approach is very well suited for detection of faulty filters.
Revista EIA | 2014
John M. Espinosa-Duran; Pedro P. Liévano-Torres; Claudia P. Rentería-Mejía; Jaime Velasco-Medina
Ingeniería y Universidad | 2013
Pedro P. Liévano-Torres; John M. Espinosa-Duran; Jaime Velasco-Medina
Archive | 2013
Pedro P. Liévano-Torres; John M. Espinosa-Duran; Jaime Velasco-Medina