Jolanta Celinska

Effects of scaling the film thickness on the ferroelectric properties of SrBi2Ta2O9 ultra thin films

We have investigated the effect of reducing the thickness of strontium bismuth tantalate film to as low as 25 nm on its ferroelectric characteristics. A degradation of ferroelectric properties such as significant reduction in remanent polarization is generally observed with reduction in film thickness, in particular below 100 nm. This has been overcome by using a modified deposition process sequence and a crystallization technique based completely on the rapid thermal annealing process. The resulting ultrathin films show good remanent polarization, low-voltage saturation, low leakage current, high breakdown strength, and good endurance. These films demonstrate the potential for scaling and are excellent candidates for several generations of ferroelectric random access memory applications.

RE-PROGRAMMABLE ANTIFUSE FPGA UTILIZING RESISTIVE CeRAM ELEMENTS

A novel architecture utilizing resistive Correlated Electron Random Access Memory (CeRAM) elements to build re-programmable antifuse Field Programmable Gate Array (FPGA) components is introduced. Unlike traditional antifuse switching elements that can become permanently conducting upon application of the programming voltage, CeRAM antifuse elements can be subsequently switched back to an insulating state upon application of a reset voltage allowing the designer the freedom to re-configure the FPGA. Because the CeRAM element is based on a metal-insulator-metal (MIM) stack structure, it can be easily integrated in the upper metal layers of the fabrication process virtually eliminating the need for routing of channels between logic blocks. By utilizing CeRAM structures in the routing resources and as the block memory, it is possible to enhance the density by as much as 6 times, significantly reducing the size of the array while maintaining the use of existing low power logic styles.

Low temperature process for strontium bismuth tantalate thin films

Abstract As CMOS dimensions shrink so does the limitation on total thermal budget for processing. For 0.18 μm design rules, the junction depth and the salicide process requirements limit the maximum processing temperature to below 700°C, preferably down to 650°C. For FeRAMs, this results in limitation on the thermal budget available for the crystallization of ferroelectric films. SBT and SBTN films have been generally annealed at 700°C or higher. Lowering the crystallization temperature down to 650°C requires the suppression of fluorite phase in order to obtain good ferroelectric performance. We have developed a CSD based low temperature process for SBT films yielding excellent ferroelectric properties. Several materials and process parameters have been optimized to suppress the fluorite phase. These include film stoichiometry and thickness, anneal ambient and ramp rates, UV energy and precursor solvents. In this paper we present a complete 650°C process for SBT thin films, highlighting process modifications and their effect on ferroelectric performance.

A non-filamentary model for unipolar switching transition metal oxide resistance random access memories

A model for resistance random access memory (RRAM) is proposed. The RRAM under research utilizes certain transition metal oxide (TMO) such as NiO which shows unipolar switching behavior. The existence of metal/insulator states is not explained by filaments but attributed to different Hubbard U values, which stems from an electron correlation effect. Current-voltage formulae are given both on the metal and insulator sides by putting the appropriate solutions of Hubbard model into the mesoscopic Meir-Wingreen transport equation. The RESET phenomenon is explained by a sufficient separation of Fermi levels in the electrodes and hence a Mott transition can be triggered in the anodic region due to a lack of electrons. The SET behavior originates from a tunneling current which removes the insulating region near the anode. Several experimental evidences are also presented to support this model. The model also serves as the theoretical prototype of Correlated Electron Random Access Memory (CeRAM) which is defined to be a TMO RRAM whose working mechanism is based on the strong electron correlation effects.

Low temperature preparation of ferroelectric bismuth titanate thin films

The low temperature metal organic decomposition techniques of ferroelectric bismuth titanate (BIT) thin films were investigated. BIT was found to be crystallized by rapid thermal processing at 450 °C. The stoichiometric Bi4Ti3O12 sample exhibited (117) orientation, while the Bi4.8Ti3O13.2 sample, with 20% excess bismuth, possessed a/b axes orientation with (117) component. Pt/Bi4.8Ti3O13.2/Pt ferroelectric capacitors were fabricated with temperature confined below 450 °C. The saturated 2Pr value was 31.1 μC/cm2. Such method is valuable for ferroelectric memories at 65 nm technology node and beyond because low temperature processes are required for the stability of interconnect material nickel silicide.

Material and process optimization of correlated electron random access memories

A method of making transition metal oxide materials that result in resistive switching properties stable over time and temperature is described. We have developed an ultra low temperature (≤450°C) process for carbonyl ligand modified NiO thin films based on the chemical solution deposition (CSD) for correlated electron random access memory (CeRAM) applications. CeRAMs form the general class of devices that use the electron-electron interaction as the primary mode of operation. These devices are fabricated in the conductive state (born-ON), thus, they do not require electroforming to enter the variable resistance state. Several process parameters such as film stoichiometry, thickness, annealing temperature and ambient have been investigated to optimize CeRAMs properties. We present the coordination number ‘fine tuning’ in NiO ultra thin films via carbonyl ligand doping that regulate the number of oxygen vacancies and the surface excess of metal ions. CeRAMs contrary to just standard NiO based resistive mem...

A comparative study on Bi4Ti3O12 and Bi3.25La0.75Ti3O12 ferroelectric thin films derived by metal organic decomposition

The crystal orientations and electrical properties of Bi4Ti3O12 (BIT) and Bi3.25La0.75Ti3O12 (BLT) ferroelectric thin films were studied and compared. Stoichiometric BIT and BLT samples were deposited on Pt(111) substrates and crystallized at 750 °C to get mixed orientations. The BIT sample exhibited a/b axes orientation with (117) component, while the BLT sample was more c-axis oriented. The 2Pr values of such BIT and BLT were 34.3 μC/cm2 and 25.7 μC/cm2, respectively. Nevertheless, BLT has much better leakage current and polarization saturation properties. In order to obtain c-axis oriented BIT thin films, excess bismuth was used. BIT with 15% excess bismuth processed at 750 °C was purely c-axis oriented and only possessed a 2Pr value of 4.9 μC/cm2, while that of 15% excess bismuth BLT sample was 18.3 μC/cm2. This can be attributed to the large polarization anisotropy in BIT, and this anisotropy is reduced by lanthanum doping.

Device characterization of correlated electron random access memories

The switching properties and characterization of correlated electron random Access Memories (CeRAMs) are described herein. High temperature retention, cycle dispersion and optimization, cycle Fatigue, and switching parameter optimization have been investigated. CeRAM’s display initially conductive or “born-ON” behavior without the need for the high electroforming voltages usually required for other transition metal oxide based resistive memories. Nonvolatile data retention at elevated temperatures up to 573 K (300 °C) in addition to a wide operating range from 4 to 423 K for CeRAM has been confirmed. CeRAMs also show exceptional read endurance with no evidence of fatigue out to 1012 cycles. Desirable scaling characteristics for high density memory application have also been shown for CeRAMs due to a widening of the read window and consistent write window as devices are scaled down.

Sub-100 nm SrBi2Ta2O9 film with ultrathin BiTaO4 capping layer for 3 V or lower-voltage ferroelectric memory operation

This letter proposes an enhanced 700 °C process to improve the dielectric breakdown strength and surface roughness of sub-100 nm SrBi2Ta2O9 (SBT) film with a thin (<20 nm) BiTaO4 (BT) layer for the 3 V or lower voltage ferroelectric memory. The process temperature for rapid thermal annealing and furnace annealing is performed at or below 700 °C. The BT layer is used as a capping layer on top of SBT film. It improves the dielectric breakdown strength (1.2 MV/cm) of SBT film without sacrificing other ferroelectric properties.

Enhanced pyroelectric sensitivity using ferroelectric active mode detection

Active pyroelectric detection (APD), using ferroelectrics as the sensing materials, is described and compared to traditional-passive pyroelectric modes of operation. The active approach yields a number of distinct advantages over its passive counterparts, including greater effective pyroelectric coefficient and improved signal to noise ratio. Thin film test structures formed from strontium bismuth tantalate (SrBi2Ta2O9) are used to demonstrate the APD principle.