Jonas Rox

Providing accurate event models for the analysis of heterogeneous multiprocessor systems

This paper proposes a new method for deriving quantitative event information for compositional multiprocessor performance analysis. This procedure brakes down the complexity into the analysis of individual components (tasks mapped to resources) and the propagation of the timing information with the help of event models. This paper improves previous methods to derive event models in a multiprocessor system by providing tighter bounds and allowing arbitrarily shaped event models. The procedure is based on a a simple yet expressive resource model called the multiple event busy time which can be derived on the basis of classical scheduling theory -- it can therefore be provided for a large domain of scheduling policies. Our experiments show that overestimation by previous methods can be reduced significantly.

System Level Performance Analysis for Real-Time Automotive Multicore and Network Architectures

Software timing aspects have only recently received broad attention in the automotive industry. New design trends and the ongoing work in the AUTOSAR (Automotive Open System Architecture) partnership have significantly increased the industrys awareness to these issues. Now, timing is recognized as a major challenge and has been put explicitly on the agenda of AUTOSAR and other industry-driven research projects. The goals include complementing the existing standard by a timing view and adding methodological steps, if necessary. Clearly, establishing such timing models requires knowing well the implications of modern architectures and topologies. In this paper, we survey existing performance analysis approaches from real-time systems research and compare them to the established layered software architectures of automotive system design. We highlight key challenges for the application of performance analysis in this domain and identify structural as well as behavioral ldquomodeling gapsrdquo. While structural gaps can be overcome by model transformations, behavioral gaps require real extensions to known analyses. We discuss two such extensions in detail, namely, the use of hierarchical event models and the specialties of timing analysis for multicore platforms. This paper concludes with an overview over qualitative comparisons of analysis techniques, both technically and concerning their industrial applicability.

Modeling of Ethernet AVB Networks for Worst-Case Timing Analysis

Abstract Ethernet is currently explored as the upcoming network standard for distributed control applications in many different industries such as automotive, avionics and industrial automation. It offers higher performance and flexibility over traditional control bus systems such as CAN and ProfiBus. For distributed control applications, predictable communication timing is highly important which can be problematic using standard Ethernet. The new Ethernet AVB standard aims to improve this by a new scheduling algorithm based on traffic shaping. However, the current AVB standard lacks a formal timing guarantee which is important for safety-critical control applications. As a solution to this, we present a model for Ethernet AVB networks and a transformation into a timing analysis model. Based on the timing model, we apply a compositional performance analysis approach known from the analysis of distributed real-time systems to derive worst-case timing properties and hence timing guarantees of the original Ethernet AVB network. For this, we provide the required formalism for the analysis of the scheduling of Ethernet AVB.

Exploiting inter-event stream correlations between output event streams of non-preemptively scheduled tasks

In this paper we present a new technique which exploits timing-correlation between tasks for scheduling analysis in multiprocessor and distributed systems with non-preemptive scheduled resources. Previously developed techniques also allow capturing and exploiting timing-correlation in distributed systems. However, they focus on timing correlations resulting from data dependencies between tasks. The new technique presented in this paper is orthogonal to the existing ones and allows capturing timing-correlations between the output event streams of tasks resulting from the use of a non-preemptive scheduling policy on a resource. We also show how these timing-correlations can be exploited to calculate tighter bounds for the worst-case response time analysis for tasks activated by such correlated event streams.

Modeling structured event streams in system level performance analysis

This paper extends the methodology of analytic real-time analysis of distributed embedded systems towards merging and extracting sub-streams based on event type information. For example, one may first merge a set of given event streams, then process them jointly and finally decompose them into separate streams again. In other words, data streams can be hierarchically composed into higher level event streams and decomposed later on again. The proposed technique is strictly compositional, hence highly suited for being embedded into well known performance evaluation frameworks such as Symta/S and MPA (Modular Performance Analysis). It is based on a novel characterization of structured event streams which we denote as Event Count Curves. They characterize the structure of event streams in which the individual events belong to a finite number of classes. This new concept avoids the explicit maintenance of stream-individual information when routing a composed stream through a network of system components. Nevertheless it allows an arbitrary composition and decomposition of sub-streams at any stage of the distributed event processing. For evaluating our approach we analyze a realistic case-study and compare the obtained results with other existing techniques.

Construction and Deconstruction of Hierarchical Event Streams with Multiple Hierarchical Layers

Compositional scheduling analysis couples local scheduling analysis via event streams. While local analysis has successfully been extended to include hierarchical scheduling strategies, event streams are still flat. In this paper, we formally define hierarchical event streams, which cannot only be constructed from flat event streams, but also from hierarchical streams allowing event streams with multiple hierarchical layers. We define an hierarchical event model and the operations to construct and deconstruct hierarchical events streams. Finally, we demonstrate how the model can be integrated in an existing analysis approach for distributed systems, enabling superior analysis results.

Real-time communication analysis for networks with two-stage arbitration

Current on-chip and macro networks use multi-stage arbitration schemes which independently assign different resources such as crossbar inputs and outputs to individual traffic streams. To use these networks in real-time systems, their worst-case behavior must be proved analytically in order to ensure the required timing guarantees. Current analysis approaches, however, do not capture the multi-stage arbitration accurately. In this paper, we propose an analysis that maps the multi-stage arbitration to a schedulability analysis of multiprocessors with shared resources. This allows the exploitation of knowledge about the worst-case behavior of the individual traffic streams, which is required to provide non-symmetric guarantees. Using this scheduling analysis approach, a detailed analysis solution for a common multi-stage arbitration scheme (iSLIP) is presented. Finally, we evaluate the proposed approach experimentally and compare it to previous work.

Modeling event stream hierarchies with hierarchical event models

Compositional scheduling analysis couples local scheduling analysis via event streams. While local analysis has successfully been extended to include hierarchical scheduling strategies, event streams are still flat. In this paper, we generalize the concept of a stream hierarchy to embed different types of streams in a higher level structure. We explain why this extension is a natural match to model streams generated by communication stacks that are ubiquitous in networked embedded systems. We formally define the hierarchical event model and give operations to encode, combine, and extract stream properties that can be used in flat or hierarchical local scheduling analysis. Finally, we give an example and demonstrate that the proposed model enables superior analysis results.

Exploring the worst-case timing of Ethernet AVB for industrial applications

Predictable and low-latency communication timing is one of the major challenges for employing Ethernet-based networks in industrial automation. The evolving Ethernet AVB standard appears to be a promising architecture, as it provides mechanisms for predictable timing with standard Ethernet hardware. However, the worst-case timing of Ethernet AVB still has to be evaluated. In this paper, we analyze the timing of Ethernet AVB using both simulation and a formal worst-case analysis based on Compositional Performance Analysis known from embedded computing systems. We investigate two industrial scenarios, a typical line topology and a more complex two-level network, and compare the results from analysis and simulation. This allows us get a good indication of the applicability of the current Ethernet AVB with respect to predictable low-latency timing in industrial automation networks. We also gain an understanding of the benefits and limitations of formal Compositional Performance Analysis compared to simulation in this context.

Using timing analysis for the design of future switched based ethernet automotive networks

In this paper, we focus on modeling and analyzing multi-cast and broadcast traffic latencies on switch-level within an Ethernet- based communication network for automotive applications. The analysis is performed adapting existing worst/best case schedulability analysis concepts, techniques, and methods. Under our modeling assumptions, we obtain safe bounds for both the minimum (lower bound) and maximum (upper bound) latencies. The formal analysis results are validated via simulation to determine the probability distribution of the latencies (including the worst/best case ones). We also show that the bounds can be tightened under some assumptions and we sketch opportunities for future work in this area. Finally, we show how formal analysis can be used to quickly explore tradeoffs in the system configuration which delivers the required performance. All results in this work are obtained on a moderately complex yet meaningful automotive example.