Jordi Cosp Vilella

Design of an On-Chip Hybrid DC/DC Converter

This paper presents the design of a hybrid on-chip VLSI DC/DC converter for low to medium integrated circuit power consumption that combines a switching and a linear regulator in parallel. The main goal is to take the best of both approaches, obtaining good power efficiency as in switching DC/DC converters, with small voltage output ripple as in linear converters. While the switching regulator is used to drive most of the load current, the linear regulator supplies the required current to filter out the steady state ripple due to inductor switching without the need of a filtering output capacitor. In addition, the second regulator supplies the required current when the load changes abruptly and the inductor current is momentarily insufficient. The design has been tested with simulations using a standard 180-nm CMOS technology showing good performance.

Approach to the modeling of LDO–assisted DC–DC voltage linear regulators

This paper presents the design of a LDO-assisted DC-DC converters in Cadence Virtuoso based on a 350-nm CMOS technology. This kind of voltage regulators consists of a switching converter together with a classic or LDO (low dropout) linear voltage regulator. While the linear regulator provides the constant output voltage, the switching converter conducts nearly all the current provided in the output load, and keeping the regulator current close to zero where the higher efficiency is achieved. In addition, current article shows the modeling in Matlab/Simulink. This modeling is mandatory in order to predict and assure the stability of the circuit. In addition, it can allow improving the performance of the circuit.