Herminio Martínez-García

Design of an on-chip linear-assisted DC-DC voltage regulator

This article shows the design of an on-chip CMOS linear-assisted DC-DC regulator. It results a good alternative topology to classic switching DC-DC power converters. In the presented technique, an auxiliary linear regulator is used to cancel the output voltage ripple and provides fast responses for load and line variations. On the other hand, a switching converter, connected in parallel, allows supplying almost the whole output current demanded by the load. The objective of this linear-assisted regulator or hybrid topology is to achieve a high efficiency of switching converters, with suitable load and line regulation features, typical of linear regulators. In this kind of on-chip applications, CMOS is the current prevailing technology. Thus, in order to implement on-chip power supply systems and on-chip power management systems with low-to-medium current consumption, this structure has good features.

An LPV Fractional Model for Canal Control

Abstract In this paper an LPV non-integer order control model of an irrigation canal is derived from system identification experiments. This model is experimentally obtained by using the described LPV fractional identification procedure. This procedure consists on the identification of a non-linear order model in each operation point of the canal. The global LPV model is obtained by the polynomial interpolation of the parameters of the local models. The validation results show that fractional models are more accurate than integer models. Therefore the fractional models have an important role to play in management and efficient use of water resources.

Design of a 4.5-V, 450-mA low-dropout voltage linear regulator based on a cascoded OTA

This article aims to present the design of a 4.5-V, 450-mA low drop-out (LDO) voltage linear regulator based on a two-stage cascoded operational transconductance amplifier (OTA) as error amplifier. The aforementioned two-stage OTA is designed with cascoded current mirroring technique to boost up the output impedance. The proposed OTA has a DC gain of 101 dB under no load condition. The designed reference voltage included in the LDO regulator is provided by a band gap reference with the temperature coefficient (Tγ) of 0.025 mV/°C. The proposed LDO regulator has a maximum drop-out voltage of 0.5 V @ 450 mA of load current, and has the worst case power supply rejection ratio (PSRR) of [54.5 dB, 34.3 dB] @ [100 Hz, 10 kHz] in full load condition. All the proposed circuits are designed using a 0.35 μm CMOS technology. The design is checked in order to corroborate its performance for wide range of input voltage, founding that the circuit design works fine meeting all the initial specification requirements.

Integrated power management system based on efficient LDO-assisted DC/DC buck converter

In this paper, a new structure based on linear-assisted DC-DC buck converter principle is proposed. Using a new class-AB LDO regulator instead of the conventional linear one (based on a push-pull output stage) in the hybrid scheme, reduces the difference between input and output voltages and also the switching frequency of the buck converter. Thus, the proposal achieves higher power efficiency rather than the conventional linear-assisted converter, desired for power management systems of battery operated devices like biomedical implants and energy harvesting applications. In addition, the circuit provides a lower output ripple and better transient response. A comparison analysis is done with regards to the considered performance indexes between the proposed structure and linear-assisted buck converter, and the results are validated in HSPICE in a 0.35 μm CMOS process.

LDO-assisted vs. linear-assisted DC/DC converters: A comprehensive study and comparison

This paper deals with a comprehensive study and comparison on the conventional linear-assisted converter and a new structure named, LDO-assisted converter based on a new class-AB LDO regulator instead of the conventional linear one, in terms of efficiency, output ripple, and load transient response. The new structure reduces difference between input and output voltages and also switching frequency of the buck converter, corresponding to higher power efficiency, desired for power management systems of battery operated devices like biomedical implants and energy harvesting applications. A comparison analysis is done and the results are validated in HSPICE in a 0.18 μm CMOS process.

SIDO buck converter with independent outputs

The portable electronics market is rapidly migrating towards more compact devices requiring multiple high-integrity high-efficiency voltage supplies for empowering the systems. This paper demonstrates a single inductor used in a buck converter with two output voltages from an input battery with voltage of value 3V. The main target is low cross regulation between the two outputs to supply independent load current levels while maintaining desired output voltage values well within a ripple that is set by adaptive hysteresis levels. A reverse current detector to avoid negative current flowing through the inductor prevents efficiency degradation at light load.

Enhancing the performance of output-capacitorless LDO regulators by pass-transistor segmentation

This paper deals with a circuit proposal along with theoretical analysis to provide a solution for enhancing the stability and transient performance of external capacitorless low-dropout regulators (CL-LDOs) by segmenting the pass transistor to smaller sizes. The stability and transient analysis is carried out on the CL-LDO with two different size-segmented pass transistors in comparison with the conventional CL-LDO with single large size pass device. The analysis shows that the pass transistor segmentation leads to better stability, i.e., greater phase margin especially at no-load and light-load conditions, wider bandwidth, and improved transient behavior, i.e., lower settling time and output voltage deviations due to the load transients. The aforementioned topologies are modeled and validated in HSPICE using a 0.35 μm CMOS process, and the results are in conformity with the analytical statements.

An output-capacitorless FVF-based low-dropout regulator for power management applications

This paper presents an output-capacitorless low-dropout (LDO) regulator based on improved flipped voltage follower power stage for use in power management circuits. A new error amplifier (EA) structure, named as gain-bandwidth enhanced EA, is embedded in the LDO regulator. The LDO regulator is designed for the input and output voltages of 1.2 V and 1 V, respectively. Fast transients, low overshoot and undershoot, and low quiescent current of 6 μΑ are achieved for the proposed circuit. The LDO regulator is designed for maximum load current of 50 mA, achieving the current and power efficiencies of 99.99% and 83.3%, respectively. Additionally, up to 131 pF capacitance is used in the proposed LDO structure. The proposed circuit is designed and verified in HSPICE in TSMC 0.18 μm mixed signal CMOS process.

Design of a constant switching frequency control-based linear-Assisted DC/DC regulator for photovoltaic solar-powered facilities

This article shows the proposal of a linear-assisted converter or linear-&-switching hybrid converter with a constant switching frequency. The control loop of the system is based on the current-mode technique. The main disadvantage of a converter with current-mode control is the inherent instability of the loop when switch duty ratios are greater than 0.5. In order to make stable the proposed linear-assisted converter, the article shows the technique based on a slope compensation.

Application of modified current-mode one-cycle control in a linear-assisted DC/DC regulator

Linear-assisted DC/DC converters are structures that allow to take advantages of the two classic alternatives in the design of power supply systems: Voltage linear regulators (classic NPN topology or LDO -low dropout-) and switching DC/DC converters. This paper shows the proposal of a modified current-mode one-cycle control for linear-assisted DC/DC converters. The modified current-mode one-cycle control technique is proposed in order to obtain the duty cycle of the linear-assisted converter switch. The proposed structure can provide an output with suitable load and line regulations. The paper shows the design of the proposed modified current-mode one-cycle linear-assisted regulator and simulation results that validate the aforementioned proposal.