Jörg Wilberg

Embedded system design

In the past decade the main engine of electronic design automation has been the widespread application of ASICs (Application Specific Integrated Circuits). Present technology supports complete systems on a chip, most often used as so-called embedded systems in an increasing number of applications. Embedded systems pose new design challenges which we believe will be the driving forces of design automation in the years to come. These include the design of electronic systems hardware, embedded software and hardware / software codesign. This paper explores the novel technical challenges in embedded system design and presents experiences and results of the work in this area using the CASTLE system. CASTLE supports the design of complex embedded systems and the design of the required tools. It provides a central design representation, Verilog, VHDL and C/C++ frontends, Hardware generation in VHDL and BLIF, a retargetable compiler backend and several analysis and visualization tools. Two design examples, video compression and a diesel injection control, illustrate the presented concepts.

Behavior Engineering with "Dual Dynamics" Models and Design Tools

Dual Dynamics (DD) is a mathematical model of a behavior control system for mobile autonomous robots. Behaviors are specified through differential equations, forming a global dynamical system made of behavior subsystems which interact in a number of ways. DD models can be directly compiled into executable code. The article (i) explains the model, (ii) sketches the Dual Dynamics Designer (DDD) environment that we use for the design, simulation, implementation and documentation, and (iii) illustrates our approach with the example of kicking a moving ball into a goal.

Design flow for hardware/software cosynthesis of a video compression system

The implementation of a cosynthesis design flow in the CASTLE (Codesign And Synthesis Tool Environment) system is presented. The design flow generates a synthesizable hardware description and a C, C++, or Fortran compiler for an application-oriented processor. The approach is illustrated by the design of an embedded video compression system which can be integrated into the video card of a PC. The design flow is structured as follows. First, the requirements of the application programs are analyzed. Based on these analysis results, the designer decides on the appropriate processor structure. The processor structure is entered on a block diagram level into the CASTLE system by using a schematic entry. The CASTLE system performs the processor cosynthesis based on a VHDL library of processor components. Several processor datapaths for the video compression system were synthesized to illustrate the trade-offs between flexibility and performance when designing application-oriented processors.<<ETX>>

VLIW Processor Codesign for Video Processing

A codesign approach for complex video compression systems is presented. The system is based on a flexible and programmable VLIW (Very Long Instruction Word) architecture. The design approach can be subdivided into two phases: a quantitative analysis for deriving the main processor structure and a cosynthesis for generating the processor hardware and the compiler back-end. The analysis results of different video compression algorithms are summarized. This permits to adapt the processor to a set of related applications rather than to a particular task. A compiled instruction-set simulator for analyzing large data sets is presented. An HTML-based codesign framework is shown which documents and organizes the analysis data.

Local Microcode Generation in System Design

Codesign is a promising methodology for reducing the time to market of embedded systems. Retargetable code generation is one of the critical problems that must be solved efficiently for this methodology to succeed. This chapter shows that optimizing the critical basic blocks of the code has a considerable impact on the performance of the designed systems. We introduce an automata-theoretic model of (local) microcode generation for basic blocks, and propose a practical solution to this optimization problem. Our method can be integrated into various design flows that use retargetable code generation.

A design exploration environment

The paper describes the design exploration environment of the CASTLE system. The environment allows the exploration of hardware and software for complex processor designs. The exploration is subdivided into the measurement phase and the analysis phase. The measurement phase uses a retargetable compiler to determine the performance for a large number of different processors and different programs. These fine-grained data form the input of the analysis phase. It transforms the data into abstract representations that are visualized for the designer. The results are integrated into an HTML-based framework.

Model based multi-level prototyping

In this paper, we present our approach to rapid prototyping of robot software. We propose model based multi-level prototyping using UML in combination with a refinement design flow to synchronize development of an early virtual prototype, detailed simulation models and the final real prototype. This is achieved by a core model which is the common reference for model based multi-level prototyping. We demonstrate our methodology at hand of the design of a motor control software for the RoboCup robot platform of GMD. We show that parameters obtained with the virtual prototype and tested in the simulation model are well suited estimations for the final real prototype and therefore allow to reduce time-consuming experiments with the real prototype to a minimum.