Josef Dipl.-Ing. Einzinger
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international solid-state circuits conference | 1986
Josef Dipl.-Ing. Einzinger; L. Leipold; J. Tihanyl; R. Weber
A POWER IC embodying a vertical power MOSFET and high-voltage and low-voltage CMOS stages will be reported. Figure 1 shows the block diagram of the power IC. Its output stage is a vertical N-channel MOSFET. In the interest of safety and corrosion resistance essential in automative electronics the chip must be designed as a high-side switch; i.e., the loads, involving lamps, motors, solenoid valves, etc., are grounded. Thug the chip operates in an emitter-follower configuration. To ensure full turnon of the MOSFET, the source voltage level should approach the battery voltage as closely as possible; the voltage across the gate must exceed the battery voltage by at least 7V.
Archive | 1986
Josef Dipl.-Ing. Einzinger; Christine Fellinger; Ludwig Dipl.-Ing. Leipold; Jenö Dr. Tihanyi; Roland Weber
Archive | 1987
Josef Dipl.-Ing. Einzinger; Ludwig Dipl.-Ing. Leipold; Jenö Dr. Tihanyi; Roland Weber
Archive | 1986
Josef Dipl.-Ing. Einzinger; Christine Fellinger; Ludwig Dipl.-Ing. Leipold; Jenoe Tihanyi; Roland Weber
Archive | 1986
Josef Dipl.-Ing. Einzinger; Christine Fellinger; Ludwig Dipl.-Ing. Leipold; Jenoe Tihanyi; Roland Weber
Archive | 1987
Josef Dipl.-Ing. Einzinger; Christine Fellinger; Ludwig Dipl.-Ing. Leipold; Jenö Dr. Tihanyi; Roland Weber
Archive | 1987
Josef Dipl.-Ing. Einzinger; Ludwig Dipl.-Ing. Leipold; Jenö Dr. Tihanyi; Roland Weber
Archive | 1986
Josef Dipl.-Ing. Einzinger; Christine Fellinger; Ludwig Dipl.-Ing. Leipold; Jenoe Tihanyi; Roland Weber
Archive | 1987
Josef Dipl.-Ing. Einzinger; Ludwig Dipl.-Ing. Leipold; Jenoe Tihanyi; Roland Weber
Archive | 1987
Christine Fellinger; Josef Dipl.-Ing. Einzinger; Ludwid Leipold; Jenoe Tihanyi; Roland Weber
