Josef Schnell | Researchain

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Featured researches published by Josef Schnell.

Archive | 2005

Data strobe synchronization for DRAM devices

Josef Schnell

Archive | 2005

Integrated circuit chip having a first delay circuit trimmed via a second delay circuit

Josef Schnell; Ernst Stahl

Archive | 2002

DELAY LOCK LOOP AND UPDATE METHOD WITH LIMITED DRIFT AND IMPROVED POWER SAVINGS

Josef Schnell

Archive | 2000

DLL lock scheme with multiple phase detection

Josef Schnell; Oliver Kiehl

Archive | 2005

Write burst stop function in low power DDR sDRAM

Josef Schnell; Meg Freebern

Archive | 1998

Voltage detection circuit and internal voltage clamp circuit

Josef Schnell

Archive | 2006

Memory having status register read function

Josef Schnell; Margaret Clark Freebern; Alan Deng; Bhaskar Shrestha

Archive | 2006

Method and apparatus for temperature compensating off chip driver (OCD) circuit

Farrukh Aquil; Josef Schnell

Archive | 2001

Vertically-Folded Bitline Architecture

Toshiaki Kirihata; Gerhard Mueller; Mike Clinton; Steffen Loeffler; Hartmud Terletzki; David R. Hanson; Chorng-Lii Hwang; Daniel W. Storaska; Gabriel Daniel; Louis L. Hsu; Thomas Boehler; Josef Schnell; Gerd Frankowsky; John Michael Ross; Armin M. Reith; Oliver Kiehl; Matthew R. Wordeman

Archive | 2005