Joseph Cibere

Millisecond Annealing for Semiconductor Device Applications

Over the last decade millisecond annealing (MSA) has made the transition from a research tool to a key manufacturing technology for advanced complementary metal-oxide-semiconductor (CMOS) devices. MSA provides several unique process capabilities that have been very helpful for continued scaling of CMOS. One early application was for improving carrier activation in polysilicon gate electrodes, which reduces carrier depletion effects, providing increased gate capacitance. MSA also enables the formation of highly activated ultra-shallow junctions (USJ), which is essential for controlling short-channel effects while simultaneously minimizing the transistor’s parasitic resistance. New applications have emerged in silicide annealing, especially for NiSi contacts, where MSA can reduce the tendency for dopant deactivation, film agglomeration and for formation of “pipe defects”. As device scaling continues, the need to limit atomic diffusion and defect formation calls for ever-decreasing thermal budget, opening up new opportunities for MSA. Furthermore, the processing has to be compatible with new materials, including high-K dielectrics and metal gates, as well as the features needed for strain engineering and new channel materials. Millisecond annealing is usually performed through the use of pulsed high-power flash-lamps or scanned continuous wave laser beams. The paper describes the relative merits of these approaches, including flash-assisted RTP™ (fRTP™), where rapid wafer preheating is combined with pulsed surface heating to provide great flexibility in the design of thermal profiles. Such flexibility helps optimization in the trade-off between between dopant activation, diffusion, defect annealing and device integration requirements. Another important topic is process control, including issues of wafer temperature measurement and process uniformity. Finally the paper discusses emerging applications for millisecond annealing as a manufacturing technology for new types of semiconductor devices.

Flat-top flash annealing™ for advanced CMOS processing

Millisecond annealing (MSA) has proven to be very helpful for continued scaling of CMOS through its applications in forming highly activated ultra-shallow junctions (USJ) and reducing the thermal budget for nickel silicide contact annealing. As device scaling continues, new materials are being introduced, including high-K dielectrics, metal gates, strained channels and even new channel materials, including Ge and III-V semiconductors. This progress also requires ever-decreasing thermal budget, opening up new opportunities for millisecond annealing. Thermal budget constraints arise from the need to limit atomic diffusion and also to prevent undesirable phase transitions, strain relaxation or defect formation. Limits on the maximum process temperature make it desirable to enable process innovations by extending millisecond annealing beyond the traditional regime of <;1 ms anneal duration. This paper explores how such extended heating profiles can be obtained with the flash-assisted RTP™ technology, where rapid wafer preheating is combined with pulsed surface heating that has a flexible dwell time at the peak temperature, giving the unique ability to perform “soak” anneals in a millisecond time scale. This Flat-Top Flash Annealing™ can help with complex process issues, such as optimization of USJ processes, where there are interactions between dopant activation, diffusion and defect annealing, combined with constraints from device integration requirements. The technology also provides highly uniform and repeatable processing at high wafer throughput, which is essential for high volume manufacturing.