Joseph H. Lin

Study of ADI(after develop inspection) using electron beam

In this paper, we established a method to detect defects with a size of 40nm, which is required in the machine to inspect defects on the photo resist of hp65nm generation. First of all, we clarified the mechanism of nuisance generation by electron beam and established a method to control nuisances. Next, we examined the inspection conditions required for detection of minute defects. As a result, the relation between the landing energy, brightness, or contrast and the defect detection ratio were clarified. We successfully detected minute defects of 40nm in the inspection based on a strategies obtained from these examination results to confirm that we established a method to detect minute defects. In addition, we compared defects on photo resist in electron beam inspection and electric defects in the wiring resistance measurement. As a result, the defect distribution on photo resist was found identical to the electric defect distribution. Thus, we proved that the defect inspection on photo resist using electron beam was detecting the killer defects. Therefore, we showed that the resist defect inspection using electron beam is effective for the 65nm generation.

A low-power 8-bit SAR ADC for a QCIF image sensor

In this paper, we report on an 8-bit auto-calibrating successive-approximation-register (SAR) analog-to-digital converter (ADC) for ultra-low power image sensors. The fabricated design includes an on-chip bandgap voltage reference and a tunable clock generator in addition to the SAR ADC core circuitry. Aside from two power pins, the design uses only one extra pin to output the digitized samples serially. Power consumption for the design is 21µW at 0.8V supply voltage, and it is 32µW including ancillary circuits. The sampling rate varies from 370kS/s to 1.6MS/s depending on the supply voltage. The design occupies an area of 0.2mm2 in a 0.18µm CMOS process, of which 0.073mm2 is for the SAR ADC core.

Flexible readout and integration sensor (FRIS): a bio-inspired, system-on-chip, event-based readout architecture

We present a bio-inspired system-on-chip focal plane readout architecture which at the system level, relies on an event based sampling scheme where only pixels within a programmable range of photon flux rates are output. At the pixel level, a one bit oversampled analog-to-digital converter together with a decimator allows for the quantization of signals up to 26 bits. Furthermore, digital non-uniformity correction of both gain and offset errors is applied at the pixel level prior to readout. We report test results for a prototype array fabricated in a standard 90nm CMOS process. Tests performed at room and cryogenic temperatures demonstrate the capability to operate at a temporal noise ratio as low as 1.5, an electron well capacity over 100Ge-, and an ADC LSB down to 1e-.

A bio-inspired event-driven digital readout architecture with pixel-level A/D conversion and non-uniformity correction

We present a bio-inspired readout integrated circuit (ROIC) for visible and infrared image sensors. At the system level, the architecture relies on an event based readout scheme where only pixels within a programmable range of photon flux rates are output. At the pixel level, a one bit oversampled analogto-digital converter together with a decimator allows for the quantization of signals up to 26 bits. Furthermore, digital non-uniformity correction of both gain and offset errors is applied at the pixel level prior to readout. We present results from a prototype 126×128 array fabricated in a standard 90nm CMOS process.

A 3-pin 1V 115µW 176×144 autonomous active pixel image sensor in 0.18µm CMOS

We present a micropower QCIF image sensor fabricated in 0.18µm CMOS technology. Low-power operation is achieved through a system-on-chip design methodology optimizing from device to architecture, yielding a 3-pin autonomous system. Supply voltage and reference are scaled down to 1.0V and 400mV, respectively. Compared to previous work, this imager consumes 42% less energy per pixel.

High-performance, event-driven, low-cost, and SWaP imaging sensor for hostile fire detection, homeland protection, and border security

The advanced imagers team at JHU APL and ECE has been advocating and developing a new class of sensor systems that address key system level performance bottlenecks but are sufficiently flexible to allow optimization of associated cost and size, weight, and power (SWaP) for different applications and missions. A primary component of this approach is the innovative system-on-chip architecture: Flexible Readout and Integration Sensors (FRIS). This paper reports on the development and testing of a prototype based on the FRIS concept. It will include the architecture, a summary of test results to date relevant to the hostile fire detection challenge. For this application, this prototype demonstrates the potential for this concept to yield the smallest SWaP and lowest cost imaging solution with a low false alarm rate. In addition, a specific solution based on the visible band is proposed. Similar performance and SWaP gains are expected for other wavebands such as SWIR, MWIR, and LWIR and/or other applications like persistent surveillance for critical infrastructure and border control in addition to unattended sensors.

A 32×32 single photon avalanche diode imager with delay-insensitive address-event readout

We report the design and test of a 32×32 array of single photon avalanche diodes. The imager uses a delay-insensitive address-event link for the readout. The chip is fabricated in 0.18µm CMOS in an area of 1.886×1.866 of which 4% is occupied by the readout circuits.

Study of ADI (After Develop Inspection) on photo resist wafers using electron beam (II)

We have clarified that the low-damage, high-resolution defect inspection of the photo resist patterns is ensured by the electron-beam defect inspection equipment for 32-nm generation and beyond. It has first been confirmed that the CD variations on the 65-nm width line structure formed on an ArF resist under general inspection conditions are equal to or less than the CD variations due to a general CD-SEM. We have also succeeded in understanding the resist deterioration mechanism when the ArF resist is exposed to e-beams. This understanding has led us to learn that the layer that, located in the vicinity of the resist surface, is deteriorated by e-beams has its etching rate lowered to cause even improvement on the etching resistance. These findings have enabled us to use inspection conditions that cause lower damage to resists. By using those conditions, we have been able to inspect ArF resist line-space structure wafers with line width of 65nm and pitch width of 140nm. The inspection successfully detected 15 to 20nm programmed extrusion defects with a capture rate of at least 95% and a nuisance rate of 5% or less. It has thus been revealed that e-beam defect inspection equipment are useful for inspecting defects on resist wafers with 32-nm generation and beyond.

All digital programmable Gaussian pulse generator for ultra-wideband transmitter

We demonstrate an all-digital ultra-wideband transmitter that implements programmable Gaussian monocycles. We show test results from a prototype chip in 0.5 um CMOS process and show simulation results from a 65nm CMOS process.