Recep Ozgun

Visualizing and quantifying charge distributions correlated to threshold voltage shifts in lateral organic transistors.

Lateral organic field-effect transistors (OFETs), consisting of a polystyrene (PS) polymer gate material and a pentacene organic semiconductor (OSC), were electrically polarized from bias stress during operation or in a separate charging step, and investigated with scanning Kelvin probe microscopy (SKPM) and current-voltage determinations. The charge storage inside the polymer was indicated, without any alteration of the OFET, as a surface voltage with SKPM, and correlated to a threshold voltage (VT) shift in the transistor operation. The SKPM method allows the gate material/OSC interface of the OFET to be visualized and the surface voltage variation between the two gate material interfaces to be mapped. The charge distribution for three samples was derived from the surface voltage maps using Poissons equation. Charge densities calculated this way agreed with those derived from the VT shifts and the lateral gate-OSC capacitance. We also compared the behavior of two other polymers with PS: PS accepted the most static charge in its entire volume, poly(2-trifluoromethylstyrene) (F-PS) had the most stability to bias stress, and poly(methyl methacrylate) (PMMA) showed the most leakage current and least consistent response to static charging of the three polymers. This work provides a clear demonstration that surface voltage on a working OFET gate material can be related to the quantity of static charge responsible for bias stress and nonvolatility in OFETs.

A low-power 8-bit SAR ADC for a QCIF image sensor

In this paper, we report on an 8-bit auto-calibrating successive-approximation-register (SAR) analog-to-digital converter (ADC) for ultra-low power image sensors. The fabricated design includes an on-chip bandgap voltage reference and a tunable clock generator in addition to the SAR ADC core circuitry. Aside from two power pins, the design uses only one extra pin to output the digitized samples serially. Power consumption for the design is 21µW at 0.8V supply voltage, and it is 32µW including ancillary circuits. The sampling rate varies from 370kS/s to 1.6MS/s depending on the supply voltage. The design occupies an area of 0.2mm2 in a 0.18µm CMOS process, of which 0.073mm2 is for the SAR ADC core.

Kelvin probe microscopic visualization of charge storage at polystyrene interfaces with pentacene and gold

Charge carriers trapped in polystyrene (PS) were investigated with Kelvin probe microscopy (KPM) and thermally stimulated discharge current (TSDC). Lateral heterojunctions of pentacene/PS were scanned using KPM, effectively observing polarization along a side view of a lateral nonvolatile organic field-effect transistor dielectric interface. TSDC was used to observe charge migration out of PS films and to estimate the trap energy level inside the PS, using the initial rise method.

A 3-pin 1V 115µW 176×144 autonomous active pixel image sensor in 0.18µm CMOS

We present a micropower QCIF image sensor fabricated in 0.18µm CMOS technology. Low-power operation is achieved through a system-on-chip design methodology optimizing from device to architecture, yielding a 3-pin autonomous system. Supply voltage and reference are scaled down to 1.0V and 400mV, respectively. Compared to previous work, this imager consumes 42% less energy per pixel.

Contactless fluorescence imaging with a CMOS image sensor

In this work, we utilize a CMOS active pixel sensor in a fluorescence imaging setup. The ability to sense small light intensity changes on top of a large baseline with spatial resolution at the subcellular scale is required in fluorescence imaging. The CMOS imager presented in [1] is perfect for this application with the ability to resolve fine features coupled with high dynamic range. By using a custom imager with a relay lens we are able to realize a dramatic decrease in device size, cost and complexity of the whole system.

Silicon-on-insulator (SOI) integration for organic field effect transistor (OFET) based circuits

In this paper, we report the first silicon-on-insulator (SOI) integration technique for organic field effect transistor (OFET) based circuits. Proposed design flow relies on only basic micro-fabrication processes such as photolithography and physical vapor deposition. This novel fabrication technique allows patterning of conductive silicon gate islands on the subtrate and eases the via and interconnect patterning and deposition for a bottom-gate OFET configuration. We fabricated pand n-type transistors, and proof of concept OFET-based complementary circuits such as inverter and NAND-gate. Fabricated CMOS inverters have full rail-to-rail swing, very high gain (up to 58.3 at 60V, and 18.1 at 20V supply voltages), and outstanding noise margins of around 21V symmetric for NMhigh and NMlow at 60V supply voltage.

A spike based 3D imager chip using a mixed mode encoding readout

Spike based imagers commonly use either time-to-first spike (TTFS) or spike rate encoding exclusively. In this paper we discuss the benefits of using a mixed-mode encoding scheme backed by theoretical analysis and SPICE simulations. The mixed-mode readout uses both TTFS and spike rate information to estimate the illumination for each pixel, which lessens the maximum spike rate and timing clock speeds required for a given level of accuracy. We intend to test this methodology on a generic spike based imager chip we have designed and submitted for fabrication in a 0.13μm 3D SOI CMOS process. The imager is capable of both TTFS and spike rate encoding and should allow us to fully validate our theory.

Printed Organic Electronic Sensors

There has been great progress recently in the use of organic and carbon-based materials as the active conductors in electronic sensors for chemical species (analytes). Three principal classes of such materials are conjugated oligomers/polymers, carbon nanotubes, and molecularly imprinted polymers. These materials may be equipped with receptor subunits for analyte binding specificity, and show changed conductances when analytes bind or adsorb. There has been further advancement in the assembly of devices based on these materials into circuit elements that provide output suitable for data processing and networking. Examples of sensors based on these principles, and the mechanisms by which they transduce chemical to electrical information, are reviewed in this chapter.

Organic diode implementations in configurable architectures and temperature sensors

In this paper, we report organic semiconductor based diodes, the silicon-on-insulator (SOI) integration technique with organic field effect transistors (OFET) for configurable diode arrays and sensors. We utilize the vertical organic diode approach, in which a layer of organic semiconductor (pentacene) is sandwiched between Au- and Al-electrodes such that one of the electrodes (Au) creates a homojunction with pentacene layer and permits the hole injection, on the other hand Al electrode and pentacene couple creates a heterojunction because of their work function difference and this junction blocks the injection of holes. Proposed design flow relies on only basic microfabrication processes such as photolithography and physical vapor deposition and the novel fabrication technique allows patterning of conductive silicon gate islands on the SOI subtrate and eases the via and interconnect patterning and deposition for a bottom-gate OFET configuration.