Joseph H. Salmon

Slave I/O driver calibration using error-nulling master reference

Testing IO timing in a delay locked system using separate transmit and receive loops

Test mode enable scheme for memory

Asynchronous reset scheme for ultra-low noise port tri-state output driver circuit

MEMORY CONTROLLER FUNCTIONALITIES TO SUPPORT DATA SWIZZLING

Circuit and method for calibrating dram pullup Ron to pulldown Ron

Synthesis of a synchronization clock

Method and apparatus for optimizing timing for a multi-drop bus

Buffer circuitry for transferring signals from TTL circuitry to dual range CMOS circuitry

Burst EPROM architecture