Joseph W. Soucy

Wafer level vacuum packaging of MEMS sensors

A process has been developed for wafer level vacuum packaging MEMS sensors, which are fabricated from etched, single crystal silicon structures, anodically bonded to metallized glass wafers. Key objectives of the process design were to minimize the number of changes to sensor fabrication, insure a high level of vacuum integrity, and flexible enough to accommodate a wide range of sensor designs. Only a single change to the standard sensor fabrication is required to implement the vacuum sealing process. A seal ring of gold, 250 microns wide by 1 micron thick is applied around the perimeter of the sensor and its electrical contact pads. The key features of this vacuum sealing technology are incorporated in the silicon cap wafer. It is 200 microns thick and contains an array of cavities, 50 microns deep, which align with the MEMS devices on the glass wafer. The opposite side of the wafer is coated with 2000 angstroms of silicon dioxide and is arrayed with aluminum bond pads, which align with those on the sensor wafer. These pads are connected to the sensor by through wafer vias, which are coated with a layer of parylene, one micron thick. The parylene is applied in a vapor deposition process, and then an excimer laser is used to ablate it from the bottom of the vias to allow electrical connections to be made to the aluminum bond pads. The vias are metallized with an adhesion layer of 500 angstroms of titanium and a conduction layer of 2000 angstroms of gold. This metal is photo-patterned, to produce pads that align with those of the sensor, and then all exposed parylene is removed by reactive ion etching. This cap wafer is bonded to the sensor wafer in an ultra-high vacuum system with a base pressure of 10/sup -8/ Torr. The two wafers are held on electrostatic chucks, one of which is hinged, so that in the degas phase, both wafers can be cleaned in-situ with an ion gun. For bonding, the hinge is actuated to position the cap wafer above the sensor wafer. A pair of prisms is positioned between the wafers to allow them to be precisely aligned prior to sealing. The wafers are bonded together by heating them to 300 /spl deg/C and actuating a pair of ball screws, which clamps them together under a load of 500 Newtons. The load and temperature is maintained for one hour to allow the gold of the sensor seal ring to react with the silicon of the cap wafer. The bonded pair is slowly cooled under load to complete the sealing process. The ultimate goal of this sealing approach is to use the control ASIC chip that is paired with the sensor, as the cap structure. This would minimize the length of signal paths between the ASIC and sensor, while realizing a very compact vacuum package.

Isolation of MEMS devices from package stresses by use of compliant metal interposers

Many classes of MEMS devices, such as those with resonant structures, capacitive readouts, and diaphragm elements, are sensitive to stresses that are exerted by their surrounding package structure. Such stresses can arise as a result of changes in temperature, ambient pressure, or relative humidity. We have demonstrated a dramatic reduction in scale factor bias over temperature for a tuning fork gyroscope, by mounting it on an interposer structure within a conventional ceramic chip carrier. Holographic interferometry measurements confirmed that the deformation imposed on a sensor die directly brazed to the package was more than 5 times that of die mounted with an interposer. We have developed several configurations of metal interposer structures for mounting MEMS inertial sensors in standard ceramic chip carrier packages. The interposers are made by first precision chemically etching preforms in metal foil. These preforms are then electroplated with a wire bondable surface finish of gold over nickel. Next, they are excised from the multi-up foil panel and formed to hold the sensor within the package. The interposers are configured with either three or four tabs for holding the MEMS sensors. Gold bumps are applied to these tabs and then the sensors are attached with thermocompression bonding. This assembly is attached to the ceramic package by thermocompression bonding to gold bumps on lands of the wirebond shelf. Wirebonds are made to the I/O pads of the sensor to complete its installation

Vacuum sealed MEMS package with an optical window

A vacuum sealed package with an optical window is a useful diagnostic tool for MEMS devices as well as a critical component of optical devices, such as imaging bolometers, scanning mirrors and variable wavelength filters. In either of these applications, the package must meet a number of stringent requirements. It cannot contaminate devices by either outgassing or shedding particulates. The window must be optically flat to allow devices to be observed or measured with interferometric tools, when the package is used as a diagnostic tool. When it serves as an integral part of an optical MEMS device, the window must also have the requisite transmissibility over the devices operating wavelength range. The vacuum level in many applications can also be quite challenging to achieve. Typically, pressures less than a few millitorr are necessary to prevent gas damping from limiting attainable Q values. Packages utilized for diagnostic purposes are often subjected to harsh environmental testing to evaluate how MEMS devices respond to mechanical shock, vibration, or thermal shock. Consequently, package robustness, particularly the glass to package seal integrity, is an important design element. We have successfully used a sputtered composite structure of gold over platinum over titanium to fabricate a seal ring on the window. The window is attached to a leadless ceramic chip carrier package by soldering with a 50 microns thick eutectic gold-tin preform. The sealing process is to load package assemblies, preforms and windows into a high vacuum system, degas them, raise the temperature of all components to 325degC, bring them into contact, and cool. We have used finite element analysis to optimize the seal geometry as a function of CTE mismatch, solder material, and window material to meet environmental requirements and optical flatness specifications. We have validated these FEM calculations by subjecting sealed packages to mechanical shock and helium leak testing. The optical flatness of windows was evaluated by direct optical interferometry measurements and high resolution measurements on sealed MEMS devices. The gas permeability of sealed packages was evaluated by measuring the Q of resonant devices over a period of several months. This fundamental understanding of window design, validated by experimental testing, extends our MEMS packaging capability to support the needs of both diagnostic investigations and optical device packaging.

Design and characterization of wirebonds for use in high shock environments

MEMS inertial sensors, packaged in hermetic chip carriers, utilize free standing wirebonds to connect to the package I/O pads. Considerable care is taken in design of these wirebonds to balance impedances and minimize cross talk between excitation and readout channels. Many applications of MEMS inertial sensors require that they survive or operate in high acceleration or vibration environments. Any displacement of the wirebonds in these environments could adversely affect sensor bias and scale factor, or in extreme cases, cause sensor failure. Newer generations of high performance, navigation grade, inertial sensors are considerably larger than their predecessors and nearly fill the internal cavity of the chip carrier. Consequently, wirebond geometries can be highly constrained within these packages. Validating the wirebond design in an inertial sensor package, which is subject to a high-G environment, requires extensive testing on appropriate rail gun and shock table equipment. These tests are costly and equipment availability may be limited. It is also difficult to assess the sensitivity to variations in bond geometry or various bond defects using only physical testing. We are developing parameterized finite element models of wire bonds for use as tools to aid in design of sensor packages, and to guide the implementation of quality monitoring test and inspection requirements. Validation of the models is being done by subjecting well characterized wirebond configurations to air gun and drop table shock loads as well as conventional wire pull tests. We are also using a sensitive force gauge to measure the load required to displace a wire normal to the plane of its loop. Analytical expressions have also been developed for simple configurations, which serve as a check on both the finite element model and the experimental measurements.

Novel low temperature hermetic sealing of micropackages

Traditional methods of hermetic packaging are not easily scaled to the task of sealing micropackages, i.e. packages with volumes on the order of one cubic millimeter. Micropackages are fabricated from thin metal shells that are sealed with ceramic or metal covers. They are used to protect MEMS devices, chemical sensors, batteries, and microfluidic components, which all have limited thermal processing tolerance, e.g. less than 150°C. Glass seals are difficult to pattern at this scale and require sealing temperatures in excess of 300°C. Mechanical tolerance issues, fixturing, and electrode design constraints preclude seam sealing. The small size of micropackages makes it difficult to control and remove the heat generated during laser welding. Low temperature soldering is an option for sealing micropackages, but there is a risk of contamination with flux residues and solder wettable metallizations must be provided on both the package and cover. We have successfully sealed ceramic covers to anodized aluminum packages, with internal volumes of one cubic millimeter. The hermetic seal is made by compression of a ring of indium foil between the cover and a flange on the package. The compressive stress on the indium is maintained by an epoxy bond around the perimeter of the package. The seal is made by loading the package into an alignment fixture, placing preforms of indium and epoxy on the package flange, aligning a cover on the package, placing a weight on the cover, and curing the epoxy at 140°C on a hot plate. The process is readily scalable to sealing arrays of packages and covers. It also does not require metalized seal rings on either seal surface as required with soldering. For our application, sealing is conducted within an argon atmosphere, but we believe a dry nitrogen atmosphere would also be adequate.

A Metal Interposer for Isolating MEMS Devices from Package Stresses

Many classes of MEMS devices, such as those with resonant structures, capacitive readouts, and diaphragm elements, are sensitive to stresses that are exerted by their surrounding package structure. Such stresses can arise as a result of changes in temperature, ambient pressure, or relative humidity. We have demonstrated a dramatic reduction in scale factor bias over temperature for a tuning fork gyroscope by mounting it on an interposer structure within a conventional chip carrier, Fig. 1. Optimization of a MEMS sensor package for high performance subject to various constraints cannot be accomplished by analysis alone Hanson et al. [1]. There are too many unknown parameters, e.g., material properties, process conditions, and components/package interface conditions, to make this feasible. Extensive performance evaluation of packaged sensors is also prohibitively expensive and time consuming. However, recent advances in optoelectronic laser interferometric microscope (OELIM) methodology Furlong and Pryputniewicz [2] offer a considerable promise for effective optimization of the design of advanced MEMS components and MEMS packages. Using OELIM, sub-micron deformations of MEMS structures are readily measured with nanometer accuracy and very high spatial resolution over a range of environmental and functional conditions. This greatly facilitates characterization of dynamic and thermomechanical behavior of MEMS components, packages for MEMS, and other complex material structures. In this paper, the OELIM methodology, which allows noninvasive, remote, full-field-of-view measurements of deformations in near real-time, is presented and its viability for development of MEMS is discussed. Using OELIM methodology, sub-micron displacements of sensors can be readily observed and recorded over a range of operating conditions, Fig. 2.

Time-Lapse Measurements of Stress Relaxation in MEMS Sensor Die Bonds

Thermal compression gold bumps have been used to attach high-precision MEMS inertial sensors within hermetic ceramic packages. The bonds can be made at relatively low temperatures, are mechanically robust, and outgas at very low rates in vacuum sealed packages. The thermal expansion coefficients of MEMS die and ceramic packages are not perfectly matched and temperature gradients occur when the assembly is cooled after bonding. As a result, there is considerable residual stress in the bonded assembly, which is accommodated to some extent by distortion of the sensor die. Over time, as these stresses relax, the distortion of the die changes, which causes the spacing between elements of the integral MEMS sensor to change as well. Also, in vibrating instruments, this can change the stress state of the resonant element and cause its operating frequency to shift. An important element of sensor-package design is insuring that stress relaxation effects do not cause the instrument to drift beyond its performance specification limits over a typical lifetime of 20 years. For high precision instruments, this type of performance degradation can be greatly reduced by mounting the MEMS sensor on an interposer structure, which isolates it from package displacements. We have used a silicon interposer to closely match the thermal expansion coefficient of a sensor die and to isolate it from the package by compliant beam elements. The sensor die is brazed or gold bump bonded to the interposer, which is attached to a multilayer ceramic package through bump bonded, beam elements. Even though an interposer greatly reduces package induced strains on the sensor, it does not entirely eliminate them. We have used a phase shifting interferometric system with custom fringe analysis software to measure full-field-of-view with high spatial resolution and nanometer accuracy out of plane, the shape of an interposer-package assembly. The assembly was measured both as built and over the course of several years of aging. After six years, residual stress in the braze material of a chip bonded directly to a ceramic package, relaxes to about half of its initial value. To within the precision that we can measure the residual stress, a similar gold bump bonded assembly fully relaxes within two and a half years. An error analysis of our technique leads us to believe that the measurements are accurate to within a nanometer. In the interposer chip assembly, the observed stress induced deformation of the die is considerably reduced. Over time, as the gold bumps shear, the deflection of the interposer compliant beams diminish, accompanied by some flattening of the die attach area. We have used a combination of analytical and finite element calculations to model these observed stress relaxation behaviors and to derive a stress relaxation curve for a pattern of gold bump bonds.

Material Issues of Low Temperature Co-fired Ceramic (LTCC) Fine Pitch Chip Scale Package (CSP) Designs

LTCC substrates for fine pitch (1.0 mm and 0.8 mm) CSP applications have been designed, fabricated, and assembled. The assembly process, including ball grid array (BGA) solder ball attach, die mount, wire bond, and glob top is described. The material and physical design interaction issues that emerged during development are discussed. The initial CSP design was conventional, with co-fired yellow gold (Au) vias and capture pads and post-fired solderable gold (PtPdAu) pads for solder ball attachment. Because LTCC tape shrinks during co-fire, solder pads were applied post co-fire to ensure proper mating with existing test fixtures and to provide the best alignment relative to the CSP body. Solder pad to capture pad misalignment was visible following solder pad firing. After CSP attachment to a test board, electrical tests revealed opens. Investigation led to the following conclusions. The decreased solder pad diameter necessary to accommodate the fine pitch design was significant relative to the area allocated for the underlying via and capture pad. Misalignment that would have been hidden under larger solder pads was exposed. Even when the capture pad surface was not visibly exposed, the offset solder pad meant less material between the capture pad and the solder ball, less of a barrier to solder leaching. Solder leaching into the yellow gold, observed after CSP removal from the test board, was the cause of the electrical disconnects. In the second design, the capture pad was eliminated in order to discourage leaching by reducing the volume of yellow gold available to alloy with the solder pad during co-fire. Reflow operations still resulted in leached solder pads. A third design replaced the first-layer via yellow gold with a solderable gold. This design proved to be robust. While developing designs and fabricating these prototypes, it was noted that all ball failures consistently occurred between the solder pad and the LTCC substrate. To investigate adhesion using different metallizations, shear tests were performed on LTCC substrates with either post-fired solder pads or co-fired pads. To investigate how the substrate material affects adhesion, alumina CSPs were also sheared. Shear test results are presented.

Aluminum Nitride Chip Carrier for Micro-electro-mechanical Sensor Applications

A commercially fabricated aluminum nitride chip carrier was evaluated for packaging various types of MEMS inertial sensors. They were successfully assembled and vacuum-sealed within AlN chip carriers and their pressures have remained stable for over one year. Aging tests were conducted under electrical bias at 85°C and 85 %RH. The leakage currents were not as stable as those measured in alumina chip carriers and post test inspection of the AlN parts revealed etching of the ceramic between conductors.