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Dive into the research topics where Joy Laskar is active.

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Featured researches published by Joy Laskar.


electrical performance of electronic packaging | 2002

Integrated RF architectures in fully-organic SOP technology

M.F. Davis; A. Sutono; Sang-Woong Yoon; S. Mandal; M. Bushyager; Chang-Ho Lee; K. Lim; Stephane Pinel; M. Maeng; A. Obatoyinbo; Sudipto Chakraborty; Joy Laskar; E.M. Tentzeris; T. Nonaka; R.R. Tummala

Future wireless communications systems require better performance, lower cost, and compact RF front-end footprint. The RF front-end module development and its level of integration are, thus, continuous challenges. In most of the presently used microwave integrated circuit technologies, it is difficult to integrate the passives efficiently with required quality. Another critical obstacle in the design of passive components, which occupy the highest percentage of integrated circuit and circuit board real estate, includes the effort to reduce the module size. These issues can be addressed with multilayer substrate technology. A multilayer organic (MLO)-based process offers the potential as the next generation technology of choice for electronic packaging. It uses a cost effective process, while offering design flexibility and optimized integration due to its multilayer topology. We present the design, model, and measurement data of RF-microwave multilayer transitions and integrated passives implemented in a MLO system on package (SOP) technology. Compact, high Q inductors, and embedded filter designs for wireless module applications are demonstrated for the first time in this technology.


vehicular technology conference | 2005

Combined effects of RF impairments in the future IEEE 802. 11n WLAN systems

Sang-hyun Woo; Dong-Jun Lee; Ki-ho Kim; Yungsik Hur; Chang-Ho Lee; Joy Laskar

In this paper, the overall performance degradation of an IEEE 802.11n WLAN system due to MIMO RF interference, AM-AM distortion of power amplifier, IQ mismatches, phase noise and their combined effects in transmitter are investigated. To extract more relevant values of RF impairments, we observed constellation diagram and the error vector magnitude (EVM) of the complete RF/modem link as a figure of merit. In addition, we propose the novel and first method for the model of the MIMO RF interference from the neighboring RF chains. We also study the implication of its presence on the performance when coupled with other RF impairments. By analyzing the experimental results, the range of values for MIMO interference, PA backoff, gain/phase error, and phase noise can be determined over which a IEEE 802.11n WLAN transmitter operates while maintaining a tolerable level of performance.


Archive | 2009

Advanced integrated communication microsystems

Joy Laskar; Sudipto Chakraborty; Manos M. Tentzeris; Franklin Bien; Anh-Vu Pham

Preface. Acknowledgements. Chapter 1: Fundamentals of Communication Systems. Introduction. 1.1 Communication systems. 1.2 History and Overview of Wireless Communication Systems. 1.3 History and Overview of Wired Communication Systems. 1.4 Communication System Fundamentals. 1.5 Electromagnetics. 1.6 Analysis of circuits and systems. 1.7 Broadband,wideband and narrowband systems. 1.8 Semiconductor technology and devices. 1.9 Key circuit topologies. 1.10 Gain/Linearity/Noise. Conclusion. Chapter 2: Wireless Communication Systems Architectures. Introduction. 2.1 Fundamental considerations. 2.2 Link Budget Analysis. 2.3 Propagation Effects. 2.4 Interface Planning. 2.5 Superheterodyne architecture. 2.6 Low IF architecture. 2.7 Direct conversion architecture. 2.8 Two stage direct conversion. 2.9 Current mode architecture. 2.10 Subsampling architecture. 2.11 Multi-band direct conversion radio. 2.12 Polar modulator. 2.13 Harmonic reject architectures. 2.14 Practical considerations for transceiver integration. Conclusion. Chapter 3: Systems Architectures for High Speed Wired Communications. 3.1 Introduction. 3.2 Band-limited channel. 3.3 Equalizer system study. References. Chapter 4: Mixed Signal Communication Systems Building Blocks. Introduction. 4.1 Inverters. 4.2 Static D flipflop. 4.3 Bias circuits. 4.4 Transconductor cores. 4.5 Load networks. 4.6 A versatile analog signal processing core. 4.7 Low noise amplifier. 4.8 Power amplifiers. 4.9 Balun. 4.10 Signal Generation Path. 4.11 Mixers. 4.12 Baseband filters. 4.13 Signal strength indicator (SSI). 4.14 ADC/DAC. Conclusion. Chapter 5 Examples of Integrated Communication Microsystems. Introduction. 5.1 Direct conversion receiver front-end. 5.2 Debugging: A practical scenario. 5.3 High speed wired communication example. Conclusion. References. Chapter 6: Low voltage, low power and low area designs. Introduction. 6.1. Power consumption considerations. 6.2 Device technology and scaling. 6.3 Low voltage design techniques. 6.4 Injection locked techniques. 6.5. Subharmonic architectures. 6.6. Superregenerative architectures. 6.7. Hearing aid applications. 6.8. Radio frequency identification tags. 6.9. Ultra low power radios. Conclusion. References. Chapter 7: Packaging for Integrated Communication Microsystems. Introduction. 7.1. Background. 7.2 Elements of a package. 7.4 Driving Forces for RF Packaging Technology. 7.5 MCM Definitions and Classifications. 7.6 RF - SOP modules. 7.7 Package modeling and optimization. 7.8 Future packaging trends. 7.9 Chip Package Co-design. 7.10 Package models and transmission lines. 7.11 Calculations for package elements. 7.12 Cross-talk. 7.13 Grounding. 7.14 Practical issues in working with packages. 7.15 Chip-package codesign examples. 7.16 Wafer scale package. 7.17 Filters using bondwire. 7.18 Packaging Limitation. Conclusion. References. Chapter 8: Advanced SOP Components and Signal Processing. Introduction. 8.1 History of compact design. 8.2 Previous Techniques in Performance Enhancement. 8.3 Design Complexities. 8.4 Modeling Complexities. 8.5 Compact Stacked Patch Antennas Using LTCC Multilayer Technology. 8.6 Suppression of Surface Waves and Radiation Pattern Improvement Using SHS Technology. 8.7 Radiation-Pattern Improvement Using a Compact Soft Surface Structure . 8.8 A Package-Level Integrated Antenna Based on LTCC Technology. Chapter 9: Characterization and Computer aided analysis of integrated microsystems. Introduction. 9.1 Computer aided analysis of wireless systems. 9.2 Measurement equipments and their operation. 9.3 Network analyzer calibration. 9.4 Wafer probing measurement. 9.5 Characterization of integrated radios. 9.6 In the laboratory.


Piers Online | 2006

Low Cost 60 GHz Gb/s Radio Development

Stephane Pinel; C-H. Lee; Saikat Sarkar; Bevin George Perumana; S. Padvanama; R. Mukhopadhyay; Joy Laskar

The recent advances of CMOS and SiGe process technologies have now made the design of lowcost highly integrated millimeter-wave radios possible in Silicon. In combination with an optimum organic Liquid Crystal Polymer packaging approach, this represents a unique opportunity to develop Gb/s radio that could address the increasing demand in term of data rate throughput of the emerging broadband wireless communication systems. In this paper we discuss the circuit and module challenges that will enable a successful deployment of 60GHz gigabits wireless systems.


ieee gallium arsenide integrated circuit symposium | 2001

A compact GaAs MESFET-based push-push oscillator MMIC using differential topology with low phase-noise performance

Sang-Woong Yoon; Chang-Ho Lee; Min-Gun Kim; Chung-Hwan Kim; Jae-Jin Lee; Joy Laskar; Songcheol Hong

We present a fully integrated 6.7 GHz push-push oscillator MMIC using a cross-coupled differential topology with a capacitive coupling feedback in a commercial GaAs MESFET process. The push-push oscillator shows phase noise of -118.83 dBc/Hz at an offset frequency of 600 kHz with a 3.3 V supply voltage. This low phase-noise performance is comparable to, or better than, the best reported results of 5/spl sim/6 GHz-band oscillators implemented in CMOS and SiGe HBT processes. A 6.4 GHz fundamental oscillator MMIC using the cross-coupled differential topology was also fabricated. The measured phase-noise of the fundamental oscillator is -108 dBc/Hz at an offset frequency of 600 kHz. In addition to the low phase-noise, the push-push oscillator in this paper occupies a compact area of 480/spl times/500 /spl mu/m/sup 2/. To our knowledge, it is the first implementation of a GaAs MESFET-based push-push oscillator MMIC using the cross-coupled differential topology with capacitive coupling feedback. This work is also the first report that shows the low phase-noise performance of the push-push oscillator using the differential topology as compared with that of the fundamental oscillator.


ieee gallium arsenide integrated circuit symposium | 2002

A C-band fully organic-based transmitter module

Chang-Ho Lee; M.F. Davis; S.-W. Yoon; S. Chakraborty; A. Sutono; Kyutae Lim; S. Pinel; Joy Laskar

We present the first report of a fully integrated multilayer organic (MLO)-based transmitter module incorporating a single MMIC for WLAN applications. We report the design and measurement of a C-band upconverter MMIC with excellent LO and image rejection as well as wideband operation fabricated in a commercial GaAs MESFET process. This development of a complete module also includes a miniaturized integrated square patch resonator band pass filter (BPF) with inset feed lines fabricated in MLO packaging technology. This realizes a compact and. highly integrated transmitter module suitable for the low cost network interface card (NIC), IEEE 802.11a WLAN applications in 56 GHz frequency band. This transmitter module demonstrates the feasibility of developing a miniature high performance and highly integrated wireless system on package (SOP)-based solutions.


radio and wireless symposium | 2003

WCDMA/GSM dual mode signal generation for direct conversion receiver

Yun-Seo Park; S. Chakraborty; S.-W. Yoon; Joy Laskar

In this paper, we discuss the design of a VCO and the frequency divider for a dual mode direct conversion receiver (WCDMA/GSM), emphasizing the topology which enables a wide tuning range while achieving low phase noise, and accurate quadrature signal generation in a standard digital 0.25/spl mu/m CMOS process. The designed VCO has a 1.06 GHz tuning range with a 4 GHz of center frequency consuming 16.8 mW from 2.25 V of the power supply. The frequency divider consumes 1 mA. Pros and cons of VCO topology are discussed, and the design of the frequency divider on the phase noise of a signal source is investigated.


Advanced Integrated Communication Microsystems | 2007

LowVoltage, LowPower, and LowArea Designs

Joy Laskar; Sudipto Chakraborty; Anh-Vu Pham; Manos M. Tantzeris

This chapter contains sections titled: Introduction Power Consumption Considerations Device Technology and Scaling Low-Voltage Design Techniques Injection-Locked Techniques Subharmonic Architectures Super-Regenerative Architectures Hearing Aid Applications Radio Frequency Identification Tags Ultra-Low-Power Radios Conclusion References


Advanced Integrated Communication Microsystems | 2007

Mixed Building Blocks of Signal Communication Systems

Joy Laskar; Sudipto Chakraborty; Anh-Vu Pham; Manos M. Tantzeris

This chapter contains sections titled: Introduction Inverters Static D Flip-Flop Bias Circuits Transconductor Cores Load Networks A Versatile Analog Signal Processing Core Low Noise Amplifier Power Amplifiers Balun Signal Generation Path Mixers Baseband Filters Signal Strength Indicator (SSI) ADC/DAC Latch Conclusion References


Advanced Integrated Communication Microsystems | 2007

Examples of Integrated Communication Microsystems

Joy Laskar; Sudipto Chakraborty; Anh-Vu Pham; Manos M. Tantzeris

This chapter contains sections titled: Introduction Direct Conversion Receiver Front End Debugging: A Practical Scenario High-Speed Wired Communication Example Conclusion References ]]>

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Chang-Ho Lee

Georgia Tech Research Institute

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Chang Ho Lee

Georgia Institute of Technology

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Sudipto Chakraborty

Georgia Institute of Technology

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Kyu Hwan An

Georgia Institute of Technology

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Kyutae Lim

Georgia Institute of Technology

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Stephane Pinel

Georgia Institute of Technology

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Ki Seok Yang

Georgia Institute of Technology

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