Juan Alejandro Herbsommer

NexFET a new power device

A new generation of Power MOSFET technology has been introduced. The devices are manufactured in a standard 0.35µm CMOS production line with only few process modules being adapted for the requirements of vertical power transistors with a 2x improvement in Figure of Merit (FOM). This improvement results mainly from the reduction in Miller capacitance.

NexFET generation 2, new way to power

In this paper, an integrated NexFET power module is presented to meet requirements on next-generation, high efficiency and high current density DC-DC converters for computer applications. The new power module uses an innovative stacked-die package technology, implements low Vth power MOSFET in the low-side position, and introduces monolithically integrated components to avoid shoot-through and minimize voltage ringing at the switch node. In synchronous buck application, this power module achieves over 90% efficiency and low switch node ringing at high output current rating (25A) and high operation frequency (1MHz) under 12V input and 1.3V output condition.

Novel thermally enhanced power package

Heat generated in microelectronic devices as a result of dissipated power is a major issue in power electronics applications resulting in elevated application PC board temperatures. In order to minimize the down ward heat transfer to the application board an efficient method enabling the upward flow of heat from the silicon die to the top of the microelectronic package and subsequently transferred to the environment via forced convection needs to be employed [1]. The problem is that most of the current packaging technologies have a very poor junction-to-top thermal resistance so it is very difficult to have a substantial portion of the heat flowing to the top of the device [2]. In this paper we present a novel power package design that enables heat conduction to the top surface of the microelectronic package through the use of a high thermal conductivity path which reduces by more than a factor of ten the junction-to-top thermal resistance compared to standard solutions. The thermal resistance junction-to-top is found to be as low as 1 C/W, which is comparable with thermal resistance junction to board. This allows for a significant portion of the dissipated energy in the die to be conducted to the topside of the package where natural or forced convection can transfer the heat to the air. We discuss the design, manufacturability, performance and reliability of the package as well as thermal measurements which demonstrates the ability of the package to dissipate the heat. We also compare this solution with existing solution sin the marketplace.

Innovative 3D integration of power MOSFETs for synchronous buck converters

Efficiency and power loss in the microelectronic devices is a major issue in power electronics applications. The engineers are challenged every year to increase power density and at the same time reduce the amount of power dissipated in the applications to keep the maximum temperatures under specifications. This situation drives a constant demand for better efficiencies in smaller packages. Traditional approaches to improve efficiency in DC/DC synchronous buck converters include reducing conduction losses in the MOSFETs through lower RDS(ON) devices and lowering switching losses through low-frequency operation. However the incremental improvements in RDS(ON) are at a point of diminishing returns and low RDS(ON) devices have large parasitic capacitances that do not facilitate the high-frequency operation required to improve power density. The drive for higher efficiency and increased power in smaller packages is being addressed by advancements in both silicon and packaging technologies. The NexFET Power Block combines these two technologies to achieve higher levels of performance, and in half the space versus discrete MOSFETs. This article explains these new technologies and highlights their performance advantage.

Understanding the source of dielectric loss in Titania/polypropylene nanocomposites up to 220 GHz

Nanocomposites are a promising new dielectric material for on-chip and chip-to-chip waveguides that operate at millimeter (mm)-wave frequencies because of their higher relative permittivity compared to neat polymers and their compatibility with printed circuit board processing. For dielectric waveguides, extremely low loss is critical; thus, understanding the origins of loss is an important step for these applications. In this paper, we investigate the sources of loss in TiO2/polypropylene (PP) nanocomposites, in which polypropylene-graft-maleic anhydride (PP-g-MA) is added as a compatibilizer. Compared to nanocomposites made without PP-g-MA, we find that PP-g-MA improves the distribution of nanoparticles in the PP matrix and significantly lowers loss. We also examine the contribution to dielectric loss from PP-g-MA by measuring samples that contain no TiO2 nanoparticles, and find that while increasing the amount of PP-g- MA in PP results in a higher loss, it is small compared to the loss that comes from the addition of TiO2 nanoparticles.

Integration of power semiconductors devices: Synchronous buck converters in a package

Integration in power semiconductor devices has been always a challenge for technologists. This occurs mainly because the integration process increases the power density with negative consequences in the temperature of the devices which deteriorate the electrical and reliability performance in comparison with discrete approach. In order to successfully integrate power microelectronic devices one needs to have semiconductor solutions with extremely good efficiency to dissipate small quantities of heat and package solutions that can conduct extremely well the heat generated so the junction temperature of the device does not exceed the maximum temperatures under specifications. Traditional approaches to improve efficiency in DC/DC synchronous buck converters include reducing conduction losses in the MOSFETs through lower RDS(ON) devices and lowering switching losses through low-frequency operation. However the incremental improvements in RDS(ON) are at a point of diminishing returns and low RDS(ON) devices have large parasitic capacitances that do not facilitate the high-frequency operation required to improve power density. The drive for higher efficiency and excellent thermal performance to achieve high degree of integration is being addressed by advancements in both silicon and packaging technologies. In this paper we present the Power Stage concept, the technology we developed in the silicon and packaging fronts in order to integrate a half bridge DC-DC synchronous Buck converter with a gate driver IC. The NexFET Power Stage achieves higher levels of performance and integration, and in half the space versus discrete MOSFETs. This article explains these new technologies and highlights their performance advantage.

Effect of Epoxy Molding Compound on the Electrical Performance of Microelectronic Devices

The epoxy mold compound (EMC) used in encapsulated microelectronic devices affects the thermal, electrical and mechanical performance of the devices. Although many studies have been conducted to test the reliability, thermal and mechanical aspects of the problem not much literature can be found analyzing the impact of the mold compound on the electrical performance of the devices. In this paper we present the results of carefully designed experiments that evaluate the effects of the EMC in the electrical performance of high-power high-frequency laterally diffused metal oxide silicon transistors.

The Electrochemical Effects of Immersion Au on Electroless Nickel and Its Consequences on the Hermetic Reliability of a Semiconductor Device

We have analyzed the effects of the thicknesses of immersion Au (i-Au) and electroless nickel (e-Ni) on the reliability of a semiconductor device that has special constraints on the absolute thicknesses of Ni and Au layers. The electrochemical reactions involved in the deposition of i-Au over Ni involve a substitution process by which Ni atoms are replaced by Au atoms. We demonstrate that, in some cases, this reaction changes the microstructure of the Ni near the perimeter of the pad where the Ni layer overlaps the passivation layer of a semiconductor die, forming a mechanical seal to the passivation. This seal is extremely important for hermetic applications where one wants to keep moisture and contaminants away from the active pad area of the semiconductor die. We have found that extended exposure of this Ni-to-passivation interface to the Au plating chemicals damages this interface, leading to reliability issues. In this paper, we analyze the phenomena by changing the thicknesses of Ni and Au layers and by observing its effects on metal-oxide-semiconductor field-effect transistors that are subjected to accelerated reliability stress testing in an autoclave.

Reliability of Bulk Acoustic Wave Resonators at High Power and High Frequency

We present the results of high-power reliability experiments performed in AlN thin-film piezoelectric bulk-acoustic-wave resonators. The experiments show that electromigration effects damage the aluminum electrodes of the device in a few hours of input power in the range of work of these devices. We have detected that this failure is very sensitive to the frequency of the input power, and we have quantified the damage using different techniques as atomic-force-microscope measurements, electrical measurements, and scanning-electron-microscope images. Due to the frequency selectivity of this effect, we present a high-power reliability experiment that allows us to compare different samples and is insensitive to the frequency of operation. We propose this technique as a standard procedure when testing for the high-power reliability of these devices. We have found that one solution to the problem is to deposit a Ti layer on top of the Al electrode to avoid the electromigration. Our results show that these improved devices can meet the expected power handling/lifetime requirement for duplexer filters in current wireless devices.