Jun Wang

Epitaxial oxides on silicon grown by molecular beam epitaxy

Using molecular beam epitaxy, thin films of perovskite-type oxide Sr x Ba 1-x TiO 3 (0 ≤ x ≤ 1) have been grown epitaxially on Si(001) substrates. Growth parameters were determined using reflection high energy electron diffraction (RHEED). Observation of RHEED during growth and X-ray diffraction analysis indicates that high quality heteroepitaxy on Si takes place with Sr x Ba 1-x TiO 3 (001)//Si(001) and Sr x Ba 1-x TiO 3 [010]//Si[110]. Extensive atomic simulations have also been carried out to understand the interface structure and give some insights into the initial growth mechanism of the oxide layers on silicon. SrTiO 3 layers grown directly on Si were used as the gate dielectric for the fabrication of MOSFET devices. An effective oxide thickness < 10 A has been obtained for a 110 A thick SrTiO 3 dielectric film with interface state density around 6.4 x 10 10 /cm 2 /eV, and the inversion layer carrier mobilities of 220 and 62 cm 2 V/s for NMOS and PMOS devices, respectively.

Study of microstructure in SrTiO3/Si by high-resolution transmission electron microscopy

©2002 Materials Research Society. The original publication is available at: http://www.mrs.org/

The (3×2) phase of Ba adsorption on Si(001)-2×1

Abstract The initial stages and surface structures of the (3×2) phase of Ba adsorption on an Si(100)-2×1 surface held at 900°C have been studied by low-energy electron diffraction, Auger electron spectroscopy, and ultra-high vacuum scanning tunneling microscopy (STM). At low coverages ( 1 6 ML) , the Ba atoms form atomic chains across the Si dimer rows by occupying valley bridge sites, as well as on fourfold sites by replacing Si dimers and exhibiting a local (3×2) phase, with the 3×-phase along the Si dimer row direction. Two different configurations for the (3×2) phase, namely, mono- and dimer-Ba models, are proposed based on the STM images. Below a coverage of 1 6 ML , the (3×2) phase is formed by single Ba atoms at fourfold sites by replacing original Si dimers. For a Ba coverage of 1 3 ML, the (3×2) phase is formed by buckled Ba dimers, as revealed by high-resolution STM images.

Properties of Epitaxial SrTiO 3 Thin Films Grown on Silicon by Molecular Beam Epitaxy

Single crystalline perovskite oxides such as SrTiO 3 (STO) are highly desirable for future generation ULSI applications. Over the past three decades, development of crystalline oxides on silicon has been a great technological challenge as an amorphous silicon oxide layer forms readily on the Si surface when exposed to oxygen preventing the intended oxide heteroepitaxy on Si substrate. Recently, we have successfully grown epitaxial STO thin films on Si(001) surface by using molecular beam epitaxy (MBE) method. Properties of the STO films on Si have been characterized using a variety of techniques including in-situ reflection high energy electron diffraction (RHEED), ex-situ X-ray diffraction (XRD), spectroscopic ellipsometry (SE), Auger electron spectroscopy (AES) and atomic force microscopy (AFM). The STO films grown on Si(001) substrate show bright and streaky RHEED patterns indicating coherent two-dimensional epitaxial oxide film growth with its unit cell rotated 450 with respect to the underlying Si unit cell. RHEED and XRD data confirm the single crystalline nature and (001) orientation of the STO films. An X-ray pole figure indicates the in-plane orientation relationship as STO[100]//Si[110] and STO(001)// Si(001). The STO surface is atomically smooth with AFM rms roughness of 1.2 AA. The leakage current density is measured to be in the low 10 −9 A/cm 2 range at 1 V, after a brief post-growth anneal in O 2 . An interface state density D it = 4.6 × 10 11 eV −1 cm −2 is inferred from the high-frequency and quasi-static C-V characteristics. The effective oxide thickness for a 200 A STO film is around 30 A and is not sensitive to post-growth anneal in O 2 at 500-700°C. These STO films are also robust against forming gas anneal. Finally, STO MOSFET structures have been fabricated and tested. An extrinsic carrier mobility value of 66 cm 2 V −1 1 s −1 is obtained for an STO PMOS device with a 2 μm effective gate length.

Epitaxial Oxide Films on Silicon: Growth, Modeling and Device Properties

Using molecular beam epitaxy, thin films perovskite-type oxide Sr x Ba 1−x TiO 3 (0≤×≤1) has been grown epitaxially on Si(001) substrates. Reflection high energy electron diffraction measurements and X-ray diffraction analysis indicate that high quality heteroepitaxy on Si takes place with Sr x Ba 1−x TiO 3 (001)//Si(001) and Sr x Ba 1−x TiO 3 [010]//Si[10]. Extensive atomic simulations have been carried out to understand the initial growth mechanism of the oxide layers on silicon. SrTiO 3 layers grown directly on Si have been used as the gate dielectric for the fabrication of MOSFET devices. By varying the growth conditions the thickness of the amorphous interfacial silicon oxide layer formed during the growth of the oxide layers has been engineered to minimize the device short channel effects. An effective oxide thickness 3 dielectric film with interface state density around 6.4 × 10 10 cm −2 e V-1 , and the inversion layer carrier mobilities of 220 cm 2 V −1 s −1 and 62 cm 2 V −l s −1 for NMOS and PMOS devices, respectively. The gate leakage in these devices is 2 orders of magnitude smaller than a comparable SiO 2 gate dielectric MOSFET.

Epitaxial BaTiO3 films on silicon for MFSFET applications

Abstract Recently, we have grown epitaxial BaTiO3 films directly on a Si (001) substrate using molecular beam epitaxy (MBE). The films have been characterized both physically (RHEED, XRD, AFM, SE) and electrically (CV & IV). The films show streaky RHEED patterns and sharp X-ray diffraction patterns, indicating epitaxial BTO growth. The leakage current is below 1E-8 A/cm2 at 2V. The CV results show good interface properties. The films exhibit a 0.5V hysteresis in the CV curves.

Barium adsorption on Si(100)-(2×1) at room temperature: a bi-polar scanning tunneling microscopy study

Abstract The initial stages of barium adsorption on Si(100)-(2×1) at room temperature has been studied by ultrahigh vacuum scanning tunneling microscopy (STM) under both positive and negative sample-bias imaging conditions. Two distinct adsorption sites have been identified by the high-resolution STM images. It was found that, with the substrate held at room temperature, barium atoms can occupy both valley-bridge sites in the trough between silicon dimers and silicon-vacancy sites. It is possible to image the barium atoms at valley-bridge sites with both negative and positive sample bias, revealing filled and empty surface states, respectively. For barium atoms adsorbed at vacancy sites, however, it is only possible to obtain filled-state images, and imaging with positive sample bias will induce the removal of the atom, possibly transferred to the tip, revealing a missing silicon dimer below.

Progress in Epitaxial Oxides on Semiconductors

In this paper, we review the recent progress in the area of epitaxial oxides on semiconductors at Motorola Labs. Critical issues such as surface preparation, initial nucleation and growth behaviors of SrTiO 3 (STO) thin film epitaxy on Si(001) are addressed. Using a systematic approach, high-quality epitaxial STO films are successfully grown on semiconductor substrates such as Si, silicon-on-insulator (SOI) and Ge. Amorphous interfacial layer between the epitaxial STO and the semiconductor can be eliminated or tailored by controlling oxide growth process and parameters. STO-based metal-oxide-semiconductor (MOS) capacitors and transistors are fabricated and tested, in order to explore the potential of STO as high-k gate dielectrics for future generation CMOS transistor technology. In addition, high-quality STO epitaxial films are utilized as thin buffer layers for fabricating integrated oxide heterostructures on semiconductors. Various perovskite oxide films such as SrZrO 3 , LaAlO 3 and Pb(Zr,Ti)O 3 are deposited epitaxially on STO-buffered Si(001) for potential high-k gate dielectrics and surface-acoustic-wave (SAW) device applications.