Jungmoon Kim

A DC–DC Boost Converter With Variation-Tolerant MPPT Technique and Efficient ZCS Circuit for Thermoelectric Energy Harvesting Applications

This paper presents a dc-dc boost converter with the maximum power point tracking (MPPT) technique for thermoelectric energy harvesting applications. The technique realizes variation tolerance by adjusting the switching frequency of the converter. A finely controlled zero-current switching (ZCS) scheme together with the accurate MPPT technique enhances the overall efficiency of the converter because of an optimal turn-on time generated by a one-shot pulse generator that is proposed. Moreover, the ZCS technique can deal with low- and high-temperature differences applied to the thermoelectric generator. This allows a wider range of conversion ratios compared to those of conventional converters used for thermal energy harvesting. Experimentally, the converter implemented in a 0.35-μm BCDMOS process had a peak efficiency of 72% at the input voltage of 500 mV while supplying a 5.62-V output.

A Regulated Charge Pump With a Low-Power Integrated Optimum Power Point Tracking Algorithm for Indoor Solar Energy Harvesting

This brief presents a regulated charge pump (CP) with an integrated optimum power point tracking (OPPT) algorithm designed for indoor solar energy harvesting. The proposed OPPT circuit does not require a current sensor that consumes power proportionally to the load. The solar cell voltage is regulated at the optimum power point; the CP output is regulated according to the target voltage. The controller of the OPPT circuit and CP dissipates only 450 nW; thus, the proposed technique is appropriate for indoor solar energy harvesting applications under dim lighting conditions.

A 0.15 V Input Energy Harvesting Charge Pump With Dynamic Body Biasing and Adaptive Dead-Time for Efficiency Improvement

A charge pump using 0.13- μm CMOS process for low-voltage energy harvesting is presented. A low-power adaptive dead-time (AD) circuit is used which automatically optimizes the dead-time according to the input voltage. A negative charge pump is also utilized for high efficiency at low input voltages (VIN). The AD circuit improves efficiency by 17% at VIN of 0.2 V compared to the fixed dead time circuit as well as enables the charge pump to work at VIN down to 0.15 V. Dynamic body bias (DBB) and switch-conductance enhancement techniques are applied to a unit stage of the three-stage charge pump. The reverse current flowing through the cross-coupled NMOS switches is prevented and the current transfer is also maximized. Together with the AD circuit and the DBB technique, the maximum output current was improved by 240% as compared to the conventional charge pump design using only the forward body bias.

Organic based flexible speaker through enhanced conductivity of PEDOT/PSS with various solvents

Flexible organic film speaker (FOFS) was fabricated with ion assisted reaction (IAR) treated poly (vinylidene fluoide) (PVDF) as active layer and poly (3,4-ethylenedioxythiophene)/poly (4-styrenesulfonate) (PEDOT/PSS), indium tin oxide (ITO) and Cu as electrodes DC conductivity (σ DC ) of pristine PEDOT/PSS increases from 0.8 to 80 S/cm with adding various organic solvents [dimethyl sulfoxide (DMSO), N, N-dimethyl formamide (DMF), tetrahydrofuran (THF)]. The increase of σ DC of PEDOT/PSS results from screening effect of organic solvents. Frequency response of sound pressure level (SPL) of film speaker is discussed in term of total current by applied electric field. The SPL of PVDF film speaker with highly conducting PEDOT/PSS (DMSO) electrode shows more flat SPL in the frequency range from 400 Hz to 10 kHz compare to Cu or ITO electrode.

23.7 Self-powered 30μW-to-10mW Piezoelectric energy-harvesting system with 9.09ms/V maximum power point tracking time

A piezoelectric (PE) energy harvesting system with one-cycle maximum power point (MPP) sensing is presented. The one-cycle MPP sensing method uses a very small size sensing capacitor and it can make the transducer output voltage reach the open circuit voltage within one cycle. The proposed MPP sensing block can sense the open circuit voltage with a proposed peak detector and stores the MPP voltage using charge sharing blocks. The one-cycle MPP sensing approach simplifies the design of an MPP tracking algorithm and greatly reduces the tracking time. All control blocks are self-biased and choose the higher voltage between the input or output voltages of the switching converter as a supply voltage (V DD). Therefore, a voltage multiplexer and a low-power ramp generator with V DD independence are also proposed to control the system without additional DC to DC converter. The entire system has been implemented in a 0.35 μm BCDMOS process. It operates at 90 kHz with a 10-mH inductor. The total power dissipation of the controller is 10 μW at a V DD of 2.7 V. The MPP tracking time is only 9.09 ms/V when the input voltage of the switching converter is changed from 3.4 V to 1.2 V.

An approach to durable poly(vinylidene fluoride) thin film loudspeaker

The piezoelectric poly(vinylidene fluoride) (PVDF) surface possessing low surface energy was modified by the ion-assisted-reaction (IAR) method for the application of thin film speaker. The IAR-treated hydrophilic PVDF surface was investigated using atomic force microscopy and x-ray photoelectron spectroscopy. The adhesion strength between various types of electrodes and the film was dramatically improved due to the hydrophilic functional groups, such as -C-O-, -(C = O)-, -(C = O)-O-, and so forth. A durable loudspeaker film was fabricated by enhancing the adhesion between the screen-printed poly(3,4-ethylenedioxythiophene)/poly(4-styrenesulfonate) (PEDOT/PSS) and the modified PVDF films. The PVDF speaker film with the PEDOT/PSS electrode showed higher durability, flatter sound pressure level characteristics, and easier processability compared to metals or indium tin oxide electrodes.

23.1 A 0.15V-input energy-harvesting charge pump with switching body biasing and adaptive dead-time for efficiency improvement

Design of low-voltage and efficient energy-harvesting circuits is becoming increasingly important, particularly, for autonomous systems. Since the amount of energy that can be harvested from the surrounding environment is limited, the available output voltage of a harvester is low. Therefore, the design of a low-input-voltage (low-VIN) up-converter is critical to self-powered systems [1-3]. Moreover, the form factor is very constrained in applications such as wearable electronic devices and sensor networks. Recently, low-VIN charge pumps (CPs) for energy harvesting has been compared with DC-DC converters using a large inductor [1-3]. CPs introduced in [1] and [2] use the advanced process technology to push VIN down to the subthreshold region. The CP in [1] introduces a forward-body-biasing (FBB) technique, which improves the voltage conversion efficiency (VCE) for low VIN but shows poor power conversion efficiency (PCE). The CP in [2] achieves the lowest operation voltage. However, the design with a 10-stage CP provides low output power. This paper presents a CP with switching-body-biasing (SBB), adaptive-dead-time (AD), and switch-conductance (SW-G) enhancement techniques to improve the PCE for low VIN as well as to extend the maximum load current.

A Self-Calibrated DLL-Based Clock Generator for an Energy-Aware EISC Processor

This paper describes a dynamic voltage and frequency scaling (DVFS) scheme for the dynamic power management (DPM) of the extendable instruction set computing processor. The DVFS circuit comprises a digitally-controlled DC-DC buck converter with a dual VCDL-based ADC and a low-power and low-jitter DLL-based clock generator with self-calibration. The prototype is fabricated in a 0.18-mum CMOS process. The implemented DVS circuit provides a supply voltage from 1.4 V to 1.8 V and the DFS circuit dynamically generates the system clock from 7.5 MHz to 120 MHz according to the workload of the embedded processor. The DVS and DFS circuits occupy 2.72 mm2 and 0.27 mm2 active areas, respectively.

An On-Chip Network Fabric Supporting Coarse-Grained Processor Array

Coarse grained arrays (CGAs) with run-time reconfigurability play an important role in accelerating reconfigurable computing applications. It is challenging to design on-chip communication networks (OCNs) for such CGAs with dynamic run-time reconfigurability whilst satisfying the tight budgets of power and area for an embedded system. This paper presents a silicon-proven design of a 64-PE circuit-switched OCN fabric with a dynamic path-setup scheme capable of supporting an embedded coarse-grained processor array. A proof-of-concept test chip fabricated in a 0.13 μm CMOS process occupies a silicon area of 23 mm2 and consumes a peak power of 200 mW @ 128 MHz and 1.2 Vcc, at room temperature. The OCN overhead consumes 9.4% of the area and 18% of the power of the total chip. Experimental results and analysis show that the proposed OCN fabric with its dynamic path-setup is suitable for use in an embedded CGA supporting fast run-time reconfigurability.

A Single-Inductor Eight-Channel Output DC–DC Converter With Time-Limited Power Distribution Control and Single Shared Hysteresis Comparator

This paper describes a time-limited power distribution control technique that can be used for single-inductor multiple-output (SIMO) DC-DC converter with many unbalanced loads. Furthermore, the true all-comparator control technique that raises no stability or complexity issues is proposed. This all-comparator technique for SIMO converters is realized only with a single shared hysteresis comparator at a constant switching frequency of 800 kHz. This leads to the development of a new inductor peak-current control technique that does not require compensators and a phase-locked loop. This converter is analyzed and compared with existing SIMO converters with respect to the requirements of next-generation power management ICs. The maximum efficiency of the converter reaches 92%. The fabricated chip supporting eight-channel outputs is implemented in a 0.35-μm CMOS process and occupies an area of 2.4 × 2.1 mm2.