Junichi Ohwada
Hitachi
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Publication
Featured researches published by Junichi Ohwada.
IEEE Transactions on Electron Devices | 1989
Akio Mimura; Nobutake Konishi; Kikuo Ono; Junichi Ohwada; Yoshikazu Hosokawa; Yoshimasa A. Ono; T. Suzuki; Kenji Miyata; Hideaki Kawakami
High-performance poly-Si TFTs were fabricated by a low-temperature 600 degrees C process utilizing hard glass substrates. To achieve low threshold voltage (V/sub TH/) and high field-effect mobility ( mu /sub FE/), the conditions for low-pressure chemical vapor deposition of the active layer poly-Si were optimized. Effective hydrogenation was studied using a multigate (maximum ten divisions) and thin-poly-Si-gate TFTs. The crystallinity of poly-Si after thermal annealing at 600 degrees C depended strongly on the poly-Si deposition temperature and was maximum at 550-560 degrees C. The V/sub TH/ and mu /sub FE/ showed a minimum and a maximum, respectively, at that poly-Si deposition temperature. The TFTs with poly-Si deposited at 500 degrees C and a 1000-AA gate had a V/sub TH/ of 6.2 V and mu /sub FE/ of 37 cm/sup 2//V-s. The high-speed operation of an enhancement-enhancement type ring oscillator showed its applicability to logic circuits. The TFTs were successfully applied to 3.3-in.-diagonal LCDs with integration of scan and data drive circuits. >
IEEE Transactions on Electron Devices | 1991
Masaru Takabatake; Junichi Ohwada; Yoshimasa A. Ono; Kikuo Ono; Akio Mimura; Nobutake Konishi
CMOS shift registers, buffers, and gray-scale representation circuits for integrated peripheral drive circuits of poly-Si TFT LCDs were fabricated at temperatures below 600 degrees C on a glass substrate. The maximum operation frequency of the CMOS shift register was 1.25 MHz. The total power consumption of the 10 stage CMOS shift registers at a clock frequency of 46.8 kHz and a power supply voltage of 20 V was 10 mu W, which is three orders of magnitude smaller than that of 10-stage nMOS shift registers. The rise and fall times of the CMOS buffers were proportional to the inverse of the channel width, and the write time of the gray-scale representation circuits was proportional to the line memory capacitance. >
Journal of Applied Physics | 1984
Makoto Matsui; Y. Shiraki; Eiichi Maruyama; Junichi Ohwada
Thin‐film transistors (TFT’s) have been fabricated on molecular‐beam‐deposited (MBD) polycrystalline silicon (poly‐Si) on transparent glass substrates using low temperature (below 600 °C) processes. The field‐effect mobility of the TFT is 40 cm2/V s at a gate voltage of 10 V, and the response time is less than 10 ns. Output characteristics of the TFT’s depend on the poly‐Si film thickness. The threshold gate voltage and the field‐effect mobility become lower and higher, respectively, with increasing film thickness. These results can be explained in terms of the thickness‐dependent crystallinity of the surface region in the MBD poly‐Si film. A 10×10 TFT matrix has been fabricated, and by combining the TFT matrix with a twisted‐nematic liquid‐crystal layer, a transmissive‐type active matrix liquid‐crystal display panel has been fabricated. This poly‐Si TFT matrix has proved to be compatible with a liquid‐crystal cell from the viewpoints of both device fabrication and transistor characteristics.
IEEE Transactions on Electron Devices | 1988
Akio Mimura; Junichi Ohwada; Yoshikazu Hosokawa; T. Suzuki; Hideaki Kawakami; Kenji Miyata
A high-quality silicon-on-insulator (SOI) layer with 3-in-diameter quartz substrate and connected silicon islands was fabricated by a radio-frequency-heated zone-melting-recrystallization method. The whole area was successfully recrystallized and 95% of the silicon layer had a
Displays | 1991
Akio Mimura; E. Kimura; T. Suzuki; Kikuo Ono; Junichi Ohwada; Nobutake Konishi; Kenji Miyata
Abstract The fabrication process of a low-temperature poly-Si thin-film transistor (TFT) with a storage capacitor was studied. The atmospheric-pressure chemical-vapour deposited SiO2 protected the buried indium tin oxide (ITO) from reduction by a pure H2 plasma treatment that was essential for the effective improvement of the poly-Si TFT characteristics. Thus, a storage capacitor with an ITO (picture electrode)-SiO2-ITO (buried common electrode) structure was successfully fabricated. The poly-Si TFT with a channel width/length W L ratio of 5 drove a 3 pF storage capacitor in 2 μs, and it showed superior driverability for LCD use. The TFT also had good hold characteristics under illumination for the realization of grey-scale representation.
Archive | 1993
Masumi Sasuga; Junichi Ohwada; Akira Kobayashi; Masaru Fujita; Hiroshi Nakamoto; Ryu Ono; Tsutomu Isono
Archive | 1996
Masahiko Suzuki; Tsutomu Isono; Kimitoshi Ohgiichi; Akira Ishii; Junichi Ohwada
Archive | 2005
Masumi Sasuga; Junichi Ohwada; Akira Kobayashi; Masaru Fujita; Hiroshi Nakamoto; Ryu Ono; Tsutomu Isono
Archive | 1987
Nobutake Konishi; Yoshikazu Hosokawa; Akio Mimura; Takaya Suzuki; Junichi Ohwada; Hideaki Kawakami; Kenji Miyata
Archive | 1991
Ono Kikuo; Kohji Takahashi; Nobutake Konishi; Junichi Ohwada; Takeshi Tanaka
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National Institute of Advanced Industrial Science and Technology
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