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Jürgen Dr.-Ing. Grafe

Infineon Technologies

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Publication

Featured researches published by Jürgen Dr.-Ing. Grafe.

Archive | 2005

Semiconductor module having an internal semiconductor chip stack, and method for producing said semiconductor module

Jürgen Dr.-Ing. Grafe; Sylke Ludewig; Jochen Thomas; Peter Weitz

Archive | 2008

Integrated circuit with re-route layer and stacked die assembly

Jochen Thomas; Peter Weitz; Jürgen Dr.-Ing. Grafe; Harry Hedler; Jens Pohl

Archive | 2006

Flip-chip-component for multichip-module, has contact recess and elevation provided at position of interlayer connection to upper surfaces of substrate so that connection is electrically or externally contactable by recess and elevation

Jürgen Dr.-Ing. Grafe; Harry Hedler; Kimyung Yoon

Archive | 2005

Board on chip package for high frequency integrated circuit, has silicon chip with core including copper wires having build-up layers, which are structured, such that copper wires on substrate is directly accessible in canal for wire bonds

Carsten Bender; Minka Gospodinova; Jürgen Dr.-Ing. Grafe; Dominique Savignac; Jochen Thomas; Ingo Wennemuth

Archive | 2003

Fine pitch ball grid array device for face-down integrated circuit chips has balls of solder on underside in contact with through-connectors under copper layer and chip

Minka Gospodinova-Daltcheva; Jürgen Dr.-Ing. Grafe; Maksim Kuzmenka; Jochen Thomas; Ingo Wennemuth

Archive | 2006

Halbleitermodul mit einem internen Halbleiterchipstapel und Verfahren zur Herstellung desselben

Jürgen Dr.-Ing. Grafe; Sylke Ludewig; Jochen Dr. Thomas; Peter Weitz

Archive | 2005

Integrierte Schaltung mit Umlenkungsschicht und Anordnung aus gestapelten Einzelschaltkreisen Integrated circuit with deflection layer and arrangement of stacked single circuits

Jürgen Dr.-Ing. Grafe; Harry Hedler; Jens Pohl; Jochen Dr. Thomas; Peter Weitz

Archive | 2005

BOC-Package BOC Package

Carsten Bender; Minka Gospodinova; Jürgen Dr.-Ing. Grafe; Dominique Savignac; Jochen Thomas; Ingo Wennemuth

Archive | 2005

An integrated circuit comprising deflection layer and arrangement of stacked individual circuits

Jürgen Dr.-Ing. Grafe; Harry Hedler; Jens Pohl; Jochen Dr. Thomas; Peter Weitz

Archive | 2004

Halbleitermodul mit einem internen Halbleiterchipstapel und Verfahren zur Herstellung desselben Of the same semiconductor module with an internal semiconductor chip stack and processes for preparing

Jürgen Dr.-Ing. Grafe; Sylke Ludewig; Jochen Dr. Thomas; Peter Weitz

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Collaboration

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Jochen Thomas

Infineon Technologies

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Peter Weitz

Infineon Technologies

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Ingo Wennemuth

Infineon Technologies

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Harry Hedler

Qimonda

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Jochen Dr. Thomas

Infineon Technologies

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Jens Pohl

Siemens

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Maksim Kuzmenka

Infineon Technologies

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Minka Gospodinova-Daltcheva

Infineon Technologies

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Sylke Ludewig

Infineon Technologies

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Carsten Bender

Infineon Technologies

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