Jussi H. Poikonen

The Performance Analysis of MPE-FEC Decoding Methods at the DVB-H Link Layer for Efficient IP Packet Retrieval

DVB-H is a new broadcasting standard, which offers reliable high data rate reception of IP packets for mobile handheld battery-powered devices. A link layer with multiprotocol encapsulation (MPE), including Reed-Solomon forward error correction (FEC) combined with a cyclic redundancy check (CRC), is defined in the standard to work on top of the DVB-T physical layer. For error correction in the receiver the DVB-H standard suggests to use erasure decoding based on the CRC information. Yet, the decoding method is not strictly determined in the standard. This paper investigates the performance of five different Reed-Solomon decoding schemes for the DVB-H link layer forward error correction called MPE-FEC. They differ on utilization strategy of existing erasure information. The performance of different decoding methods are evaluated analytically in an binary symmetric channel (BSC) and with simulations in the additive white Gaussian noise (AWGN) and a mobile fading channel. For the simulations in the fading channel a packet channel model based on actual measurements is designed. It is shown that more sophisticated decoding methods than the one suggested in the standard are required for efficient retrieval of IP packets

On Synthesis of Boolean Expressions for Memristive Devices Using Sequential Implication Logic

We determine an explicit procedure for representing any Boolean expression in a recursive form which can be realized using memristive devices, and demonstrate how the truth value of any Boolean expression can be determined using no more than two computing memristive devices. We present an algorithm which can be used to significantly reduce the number of implications required for representing a specific Boolean expression, and consider device-specific benefits in terms of reducing the lengths of computational sequences.

Implication logic synthesis methods for memristors

We propose three new synthesis methods for memristive implication logic and compare these with each other and with a basic method which was originally proposed in [5]. The results show that by using complementary representation of variables and multi-input operation, the lengths of computational sequences required for computing a given Boolean function are significantly reduced; for the three-input parity function this reduction is approximately 85 percent compared to the basic method.

Applications and limitations of memristive implication logic

In its elementary form, memristive implication logic suffers from multiple disadvantages such as the lengths of the computational sequences required to synthesize a Boolean function, the lack of fan-out, and the requirement of complex control signals. In this paper we present a new stateful logic operation available for rectifying memristors which corresponds to the logical operation known as the converse nonimplication, and show that it solves the fan-out problem. Moreover, we show how parallel stateful logic can be performed within a CMOL memory architecture, and how it can be used to shorten the computational sequences. We also discuss applications where stateful logic could be advantageous when compared to more conventional solutions.

Large-Scale Memristive Associative Memories

Associative memories, in contrast to conventional address-based memories, are inherently fault-tolerant and allow retrieval of data based on partial search information. This paper considers the possibility of implementing large-scale associative memories through memristive devices jointly with CMOS circuitry. An advantage of a memristive associative memory is that the memory elements are located physically above the CMOS layer, which yields more die area for the processing elements realized in CMOS. This allows for high-capacity memories even while using an older CMOS technology, as the capacity of the memory depends more on the feature size of the memristive crossbar than on that of the CMOS components. In this paper, we propose the memristive implementations, and present simulations and error analysis of the autoassociative content-addressable memory, the Willshaw memory, and the sparse distributed memory. Furthermore, we present a CMOS cell that can be used to implement the proposed memory architectures.

A cellular computing architecture for parallel memristive stateful logic

We present a cellular memristive stateful logic computing architecture and demonstrate its operation with computational examples such as vectorized XOR, circular shift, and content-addressable memory. The considered architecture can perform parallel elementary memristor programming and stateful logic operations, namely implication and converse nonimplication. The topology of the crossbar structure used for computing can be dynamically reconfigured, enabling combinations of local and global operations with varying granularity. In the CMOS cells used for controlling the memristors, we apply a new type of capacitive keeper circuit, which allows for energy efficient implementation of logic operations. The correct operation of this architecture is verified by detailed HSPICE simulations for a structure containing eight memristive crossbars. This work presents a hardware platform which enables future work on parallel stateful computing.

Aggregated Renewal Markov Processes With Applications in Simulating Mobile Broadcast Systems

For purposes of simulating contemporary communication systems, it is, in many cases, useful to apply error models for specific levels of abstraction. Such models should approximate the packet error behavior of a given system at a specific protocol layer, thus incorporating the possible detrimental effects of lower protocol layers. Packet error models can efficiently be realized using finite-state models; for example, there exists a wide range of studies on using Markov models to simulate communication channels. In this paper, we consider aggregated Markov processes, which are a subclass of hidden Markov models (HMMs). Artificial limitations are set on the state transition probabilities of the models to find efficient methods of parameter estimation. We apply these models to the simulation of the performance of digital video broadcasting-handheld (DVB-H). The parameters of the packet error models are approximated as functions of the time-variant received signal strength and speed of a mobile vehicular DVB-H receiver, and it is shown that useful results may be achieved with the described packet error models, particularly when simulating mobile reception in field conditions.

Memristive Stateful Logic

Memristive stateful logic refers to a form of computational logic in which memristors both store logic values and perform logical operations on these values. We present a generalized form of memristive stateful logic and define the logic operations realizable in this form. We also consider the CMOS circuitry required for reliable implementation of memristive stateful logic. Furthermore, synthesis of arbitrary Boolean functions and the parallelization of stateful logic to memristive crossbars is presented.

Comparison of finite-state models for simulating the DVB-H link layer performance

Digital video broadcasting for handheld terminals (DVB-H) is a broadcast system designed for high-speed data transmission in highly dispersive mobile channel conditions. In this paper, various finite-state models for simulating the transport stream packet error behavior of a DVB-H system operating in a multipath channel environment are presented and evaluated. The results from finite-state models are compared to measurement results. The model evaluation focuses on the accuracy of the models in replicating the high-order statistical properties of measured link layer transport stream error traces. Furthermore, the significance of these high-order error statistics such as variance in error burst length in simulating the link layer frame error rate of DVB-H is considered.

Optimal field measurement design for radio environment mapping

White spaces are locally or temporally available frequencies that are principally reserved for primary use such as TV broadcasting. The currently prevalent view to the utilization of such spectrum resources is that white space devices must query a geolocation database to obtain information about available frequencies and related maximum transmission powers. A geolocation database is fundamentally based on field strength estimates of the primary service obtained using radio propagation models. However, field strength estimates for geographically extensive broadcast networks are typically computed for spatial resolutions of hundreds of square meters. Therefore, even with the most sophisticated propagation models currently available, the predicted values always contain errors due to the limited geographical information. To overcome such deficiency, we propose a geostatistical approach for estimating the radio environment based on universal kriging interpolation. In addition, we optimize the locations of field measurements using spatial simulated annealing, and show that it improves significantly local field strength estimates. Index Terms-radio