Justin Richardson

Low Dark Count Single-Photon Avalanche Diode Structure Compatible With Standard Nanometer Scale CMOS Technology

A single-photon avalanche diode structure implemented in a 130-nm imaging process is reported. The device employs a p-well anode, rather than the commonly adopted p+, and a novel guard ring compatible with recent scaling trends in standard nanometer scale complementary metal-oxide-semiconductor technologies. The 50-mum 2 active area device exhibits a dark count rate of 25 Hz at 20 degC and a photon detection efficiency peak of 28% at 500 nm.

A Time-Resolved, Low-Noise Single-Photon Image Sensor Fabricated in Deep-Submicron CMOS Technology

We report on the design and characterization of a novel time-resolved image sensor fabricated in a 130 nm CMOS process. Each pixel within the 3232 pixel array contains a low-noise single-photon detector and a high-precision time-to-digital converter (TDC). The 10-bit TDC exhibits a timing resolution of 119 ps with a timing uniformity across the entire array of less than 2 LSBs. The differential non-linearity (DNL) and integral non-linearity (INL) were measured at ±0.4 and ±1.2 LSBs, respectively. The pixel array was fabricated with a pitch of 50 μm in both directions and with a total TDC area of less than 2000 μm2. The target application for this sensor is time-resolved imaging, in particular fluorescence lifetime imaging microscopy and 3D imaging. The characterization shows the suitability of the proposed sensor technology for these applications.

Scaleable Single-Photon Avalanche Diode Structures in Nanometer CMOS Technology

Single-photon avalanche photodiodes (SPADs) operating in Geiger mode offer exceptional time resolution and optical sensitivity. Implementation in modern nanometer-scale complementary metal-oxide-semiconductor (CMOS) technologies to create dense high-resolution arrays requires a device structure that is scaleable down to a few micrometers. A family of three SPAD structures with sub-100-Hz mean dark count rate (DCR) is proposed in 130-nm CMOS image sensor technology. Based on a novel retrograde buried n-well guard ring, these detectors are shown to readily scale from 32 to 2 μm with improving DCR, jitter, and yield. One of these detectors is compatible with standard triple-well digital CMOS, and the others bring the first low-DCR realizations at the 130-nm node of shallow-trench-isolation-bounded and enhancement SPADs.

A 32x32-pixel array with in-pixel photon counting and arrival time measurement in the analog domain

A Time-to-Amplitude Converter (TAC) with embedded analog-to-digital conversion is implemented in a 130-nm CMOS imaging technology. The proposed module is conceived for Single-Photon Avalanche Diode imagers and can operate both as a TAC or as an analog counter, thus allowing both time-correlated or time-uncorrelated imaging operation. A single-ramp, 8-bit ADC with two memory banks to allow high-speed, time-interleaved operation is also included within each module. A 32x32-TACs array has been fabricated with a 50-µm pitch in order prove the highly parallel operation and to test uniformity and power consumption issues. The measured time resolution (LSB) is of 160 ps on a 20-ns time range with a uniformity across the array within ±2LSBs, while DNL and INL are 0.7LSB and 1.9LSB respectively. The average power consumption is below 300µW/pixel when running at 500k measurements per second.

A Single-Photon Avalanche Diode in 90-nm CMOS Imaging Technology With 44% Photon Detection Efficiency at 690 nm

A CMOS and back-side illumination-compatible single-photon avalanche diode (SPAD) is reported in 90-nm imaging technology with a peak photon detection efficiency of ≈ 44% at 690 nm and better than ≈20% at 850 nm. This represents an approximately eightfold improvement in near infrared sensitivity over existing CMOS SPADs. This result has important implications for optical communications, time-of-flight ranging, and optical tomography applications. The 6.4-μm-diameter SPAD also achieves the following: low dark count rates of ≈100 Hz with ≈51-ps FWHM timing resolution and a low after-pulsing probability of ≈0.375%.

Video-rate fluorescence lifetime imaging camera with CMOS single-photon avalanche diode arrays and high-speed imaging algorithm

A high-speed and hardware-only algorithm using a center of mass method has been proposed for single-detector fluorescence lifetime sensing applications. This algorithm is now implemented on a field programmable gate array to provide fast lifetime estimates from a 32 × 32 low dark count 0.13 μm complementary metal-oxide-semiconductor single-photon avalanche diode (SPAD) plus time-to-digital converter array. A simple look-up table is included to enhance the lifetime resolvability range and photon economics, making it comparable to the commonly used least-square method and maximum-likelihood estimation based software. To demonstrate its performance, a widefield microscope was adapted to accommodate the SPAD array and image different test samples. Fluorescence lifetime imaging microscopy on fluorescent beads in Rhodamine 6G at a frame rate of 50 fps is also shown.

A 32×32 50ps resolution 10 bit time to digital converter array in 130nm CMOS for time correlated imaging

We report the design and characterisation of a 32×32 time to digital (TDC) converter plus single photon avalanche diode (SPAD) pixel array implemented in a 130nm imaging process. Based on a gated ring oscillator approach, the 10 bit, 50µm pitch TDC array exhibits a minimum time resolution of 50ps, with accuracy of ±0.5 LSB DNL and 2.4 LSB INL. Process, voltage and temperature compensation (PVT) is achieved by locking the array to a stable external clock. The resulting time correlated pixel array is a viable candidate for single photon counting (TCSPC) applications such as fluorescent lifetime imaging microscopy (FLIM), nuclear or 3D imaging and permits scaling to larger array formats.

A parallel 32×32 time-to-digital converter array fabricated in a 130 nm imaging CMOS technology

We report on the design and characterization of a 32 × 32 time-to-digital converter (TDC) array implemented in a 130 nm imaging CMOS technology. The 10-bit TDCs exhibit a timing resolution of 119 ps with a timing uniformity across the entire array of less than 2 LSBs. The differential- and integral non-linearity (DNL and INL) were measured at ± 0.4 and ±1.2 LSBs respectively. The TDC array was fabricated with a pitch of 50µm in both directions and with a total TDC area of less than 2000µm2. The characteristics of the array make it an excellent candidate for in-pixel TDC in time-resolved imagers for applications such as 3-D imaging and fluorescence lifetime imaging microscopy (FLIM).

A high speed multifocal multiphoton fluorescence lifetime imaging microscope for live-cell FRET imaging.

We demonstrate diffraction limited multiphoton imaging in a massively parallel, fully addressable time-resolved multi-beam multiphoton microscope capable of producing fluorescence lifetime images with sub-50ps temporal resolution. This imaging platform offers a significant improvement in acquisition speed over single-beam laser scanning FLIM by a factor of 64 without compromising in either the temporal or spatial resolutions of the system. We demonstrate FLIM acquisition at 500 ms with live cells expressing green fluorescent protein. The applicability of the technique to imaging protein-protein interactions in live cells is exemplified by observation of time-dependent FRET between the epidermal growth factor receptor (EGFR) and the adapter protein Grb2 following stimulation with the receptor ligand. Furthermore, ligand-dependent association of HER2-HER3 receptor tyrosine kinases was observed on a similar timescale and involved the internalisation and accumulation or receptor heterodimers within endosomes. These data demonstrate the broad applicability of this novel FLIM technique to the spatio-temporal dynamics of protein-protein interaction.

A High-Throughput Time-Resolved Mini-Silicon Photomultiplier With Embedded Fluorescence Lifetime Estimation in 0.13

We describe a miniaturized, high-throughput, time-resolved fluorescence lifetime sensor implemented in a 0.13 m CMOS process, combining single photon detection, multiple channel timing and embedded pre-processing of fluorescence lifetime estimations on a single device. Detection is achieved using an array of single photon avalanche diodes (SPADs) arranged in a digital silicon photomultiplier (SiPM) architecture with 400 ps output pulses and a 10% fill-factor. An array of time-to-digital converters (TDCs) with ≈50 ps resolution records up to 8 photon events during each excitation period. Data from the TDC array is then processed using a centre-of-mass method (CMM) pre-calculation to produce fluorescence lifetime estimations in real-time. The sensor is believed to be the first reported implementation of embedded fluorescence lifetime estimation. The system is demonstrated in a practical laboratory environment with measurements of a variety of fluorescent dyes with different single exponential lifetimes, successfully showing the sensors ability to overcome the classic pile-up limitation of time-correlated single photon counting (TCSPC) by over an order of magnitude.