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Dive into the research topics where Jyotirmoy Saikia is active.

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Featured researches published by Jyotirmoy Saikia.


asian test symposium | 2011

Breaking the Test Application Time Barriers in Compression: Adaptive Scan-Cyclical (AS-C)

Anshuman Chandra; Jyotirmoy Saikia; Rohit Kapur

Scan compression technology innovation has broken out into solving the data volume problem keeping the test application time gains relatively constant over the generations of technologies. While data volume reductions are important there is a need to take the test application time gains to the next level as it has a direct impact to the cost of test. In this paper an enhancement to combinational compression is described that relies on increasing the encoding bandwidth for aggressive test application time targets. An architecture is described that adds very little area overhead to a combinational compression architecture by reusing the internal scan chains of the design for encoding bandwidth for a set of the test patterns.


asian test symposium | 2011

Predicting Scan Compression IP Configurations for Better QoR

Jyotirmoy Saikia; Pramod Notiyath; Santosh Kulkarni; Ashok Anbalan; Rajesh Uppuluri; Tammy Fernandes; Parthajit Bhattacharya; Rohit Kapur

Scan compression technology is essentially IP that provides an interface between the scan-inputs/outputs and the internal scan chains. The IP configuration that is put into the design is based upon some user specified constraints that are related to the target compression and the available scan terminals. The configuration selected may or may not be the best suited for the design it is inserted in. Usually the compression IP can be configured in many different ways. Some configurations are better suited for particular designs than others. If one were able to predict the configuration of the compression IP to match the needs of the design then one would expect the best results from the compression technology. In this paper we describe a method to predict the optimum IP configuration for Adaptive Scan, which is a specific type of compression technology. The concepts and methodology discussed here are applicable to any compression scheme.


Archive | 2009

TEST DESIGN OPTIMIZER FOR CONFIGURABLE SCAN ARCHITECTURES

Rohit Kapur; Jyotirmoy Saikia; Rajesh Uppuluri; Pramod Notiyath; Tammy Fernandes; Santosh Kulkarni; Ashok Anbalan


Archive | 2009

METHOD AND APPARATUS FOR IMPLEMENTING A HIERARCHICAL DESIGN-FOR-TEST SOLUTION

Rohit Kapur; Anshuman Chandra; Yasunari Kanzawa; Jyotirmoy Saikia


Archive | 2011

Test Architecture Including Cyclical Cache Chains, Selective Bypass Scan Chain Segments, And Blocking Circuitry

Anshuman Chandra; Jyotirmoy Saikia; Rohit Kapur


Archive | 2009

Implementing hierarchical design-for-test logic for modular circuit design

Rohit Kapur; Anshuman Chandra; Yasunari Kanzawa; Jyotirmoy Saikia


Archive | 2014

Scheme for masking output of scan chains in test circuit

Anshuman Chandra; Subramanian Chebiyam; Jyotirmoy Saikia; Parthajit Bhattacharya; Rohit Kapur


Archive | 2014

Handling of Undesirable Distribution of Unknown Values in Testing of Circuit Using Automated Test Equipment

Anshuman Chandra; Subramanian Chebiyam; Jyotirmoy Saikia; Parthajit Bhattacharya; Rohit Kapur


Archive | 2010

Accelerating automatic test pattern generation in a multi-core computing environment via speculatively scheduled sequential multi-level parameter value optimization

Ashwin Kumar; Ramakrishnan Balasubramanian; Rohit Kapur; Rajesh Uppuluri; Jyotirmoy Saikia; Parthajit Bhattacharya; Sunil Reddy Tiyyagura


Archive | 2011

Architecture d'essai comprenant des chaînes de cache cycliques, des segments de chaîne de balayage de dérivation sélectifs, et des circuits de blocage

Anshuman Chandra; Jyotirmoy Saikia; Rohit Kapur

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