K. Shi

Analogue layout generation by World Wide Web server-based agents

A World Wide Web (WWW) based client/server system has been developed which allows server-side process independent layout generators to generate the design rule correct geometry of analogue components such as resistors, capacitors and transistors for a design system running on a local workstation. The complete system is based on the bidirectional interface between a WWW browser and a VLSI design system, with layout generators running remotely on a WWW server.

Rapid layout synthesis for analog VLSI

A technology independent synthesis system which rapidly generates the layout of analog VLSI circuits has been developed. Based on a specification of a circuits required performance and the target process, a design rule correct layout is generated. The complete system has been tested by synthesizing op amps in the CMOS and bipolar domains. Comparison of the specification with results of simulating the circuit extracted from the synthesized layout, show that the system is accurate to within a few per cent for most parameters.

A multi-mode simulation system for GaAs circuits

A novel, multi-mode hierarchical non-linear circuit simulation system called GASSIM has been developed. The GASSIM system allows circuits to be partitioned into a number of sub-circuits, which are subsequently solved by those simulation methods which are the most suitable.<<ETX>>

Non-linear multi-mode time-domain hierarchical simulation approach to microwave CAD

The proposed simulation algorithm is based on the time-domain approach and can therefore cope with transients, highly non-linear problems, complex excitations and complicated oscillation patterns. All the above problems are either difficult or impossible to solve using harmonic-balance methods. Like some other advanced time-domain CAD tools, the proposed algorithm can combine non-linear, linear and behavioural analyses during the same simulation and can therefore be used for the design of mixed type analogue/digital MMICs and complete sub-systems. However, there are four main differences between the developed method and the SPICE-type simulators: (i) preservation of the circuit hierarchy during the analysis, (ii) different analysis methods for different sub-circuits (multi-mode analysis), (iii) an open structure allowing the easy addition of new simulation techniques, and (iv) substantially higher speed. The new algorithm is particularly suitable for large circuits, such as multifunction MMICs, since a circuit is decomposed into smaller subcircuits which are simulated individually and parallelly. Each subcircuit can be solved using the most appropriate technique for that sub-circuit, leading to improved efficiency and/or accuracy. The algorithm has been tested against commercial microwave CAD programs, proving its advantages.

O/sup 2/ADL: an object-oriented analog VLSI design language

Object technology can be applied to analog VLSI design to exploit circuit compositional hierarchy, design process hierarchy and design module reuse. Conventional object-oriented programming languages are not suitable for such application due to the difficulties in describing VLSI circuit behaviour, modelling design technology/process hierarchy, implementing class name sharing and dynamically configuring design database. To overcome these difficulties, we have developed an object-oriented analog VLSI design language which provides a set of high-level constructs to conveniently describe and design VLSI circuits. A number of new concepts have been introduced in O/sup 2/ADL and a dynamic-and-selective inheritance algorithm has been developed to model the design technology/process, to reduce the size of the design database and to achieve code sharing and reusability.

A new bipolar op-amp IC synthesis approach

Bipolar op-amp IC modules with a simple circuit structure are difficult to design for a wide range of design specifications, due to strong correlations between transistor parameters. As a result, bipolar op-amps are commonly designed resorting to complicated circuit structures which result in large chip area and high fabrication cost. We have developed a new synthesis approach which can generate bipolar op-amp IC modules for a wide range of design specifications with a simple structure. The approach incorporates two new methods which we have developed to predict Miller capacitance and to calculate transistor transconductance during transistor sizing. Differing from conventional methods, our methods consider the effect of device parasitics during the synthesis and hence are accurate. The approach has been implemented in our bipolar op-amp IC synthesis package.