Winston A.J. Waller
University of Kent
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Featured researches published by Winston A.J. Waller.
international conference on electronics circuits and systems | 1999
Les T. Walczowski; Winston A.J. Waller
A World Wide Web (WWW) based client/server system has been developed which uses Java servlet technology. The system allows a server-side, process-independent layout generator servlet to generate active messages, which create design rule correct geometry of analogue components such as resistors, capacitors and transistors within a design system on the local workstation. This combination of server based servlets and active messages is a very powerful technique for developing remote applications which run in cooperation with a local design system, leading to real increases in system availability, functionality and performance.
international conference on electronics circuits and systems | 1998
D. Nalbantis; Les T. Walczowski; Winston A.J. Waller
A three-tier client/server system for the synthesis of VLSI circuits has been developed. The design system uses the World Wide Web as a backbone communications medium, whilst the sub-components of the synthesis applications are organised as servers, accessed through client/server communications between a tool server and thin client applets. This paper describes the architecture of the system, and in particular examines the use of multi-threading and multiple servers for improving system performance.
european design and test conference | 1997
Les T. Walczowski; D. Nalbantis; Winston A.J. Waller; K. Shi
A World Wide Web (WWW) based client/server system has been developed which allows server-side process independent layout generators to generate the design rule correct geometry of analogue components such as resistors, capacitors and transistors for a design system running on a local workstation. The complete system is based on the bidirectional interface between a WWW browser and a VLSI design system, with layout generators running remotely on a WWW server.
international conference on electronics circuits and systems | 1998
Les T. Walczowski; Keith R. Dimond; Winston A.J. Waller
The move to the Windows NT operating system by the University Computing Service, was an excellent opportunity for the Electronic Engineering Department at Kent to develop a new digital engineering curriculum, which closely integrated EDA tools and multi-media courseware into the syllabus. This paper examines the development of the curriculum and describes the software that has been integrated including tools for schematic capture, logic simulation, VLSI design and high-level simulation. The advantages of closely integrating computer based teaching with conventional lecture based material are described.
international conference on electronics circuits and systems | 1996
Les T. Walczowski; Winston A.J. Waller; D. Nalbantis; K. Shi
A technology independent synthesis system which rapidly generates the layout of analog VLSI circuits has been developed. Based on a specification of a circuits required performance and the target process, a design rule correct layout is generated. The complete system has been tested by synthesizing op amps in the CMOS and bipolar domains. Comparison of the specification with results of simulating the circuit extracted from the synthesized layout, show that the system is accurate to within a few per cent for most parameters.
Journal of Physics: Conference Series | 2005
Clive Maxted; Winston A.J. Waller
This paper is a description of the development of an embedded controller for high power industrial diesel generators. The aim of the project was to replace the existing discrete logic design by an intelligent versatile and user configurable control system. A prototype embedded PC controlled system was developed, capable of fully replacing the existing system, with a colour TFT display and keypad. Features include fully automatic generator control as before with status and alarm display and monitoring of engine parameters, along with data logging, remote communications and a means of analysing data. The unit was tested on the bench and on diesel generators for the core controlling functionality to prove compliance with the specifications. The results of the testing proved the units suitability as a replacement for the existing system in its intended environment. The significance of this study is that a low cost replacement solution has been found for an industrial application by transferring modern technological knowledge to a small business. The company are now able to build on the design and take it into production, reducing servicing and production costs.
custom integrated circuits conference | 1991
Les T. Walczowski; M.H. Smith; Winston A.J. Waller; D. Howard
The authors present an overview of a system designed to generate integrated circuits so that they meet their performance specifications. The system is based around CSL (Circuit Specification Language), an object-oriented language designed specifically for the purpose of generating integrated circuits. The usefulness of CSL in calculating the size of transistors in the circuit so that they meet the specification is discussed. This is the task for which CSL was originally designed but it is believed that it will prove capable of handling all stages of silicon compilation.<<ETX>>
International Journal of Electrical Engineering Education | 2000
Les T. Walczowski; Keith R. Dimond; Winston A.J. Waller
This paper examines the development of a digital engineering curriculum, which closely integrates EDA tools and multimedia courseware into the syllabus. It describes the software that has been integrated, including tools for schematic capture, logic simulation, VLSI design and high-level simulation and highlights the advantages of closely integrating computer-based teaching with conventional lecture-based material.
international symposium on circuits and systems | 1991
M.H. Smith; Les T. Walczowski; Winston A.J. Waller; D. Howard
The authors present a method for automatically calculating the size of the transistors and passive components in a CMOS op-amp given the specification and loading of the op-amp. The method is similar to that used in the OASYS program in that it uses no simulation. Like the OASYS method, the authors estimate the sizes and then calculate the parasitics. The parasitics calculated are then used to recalculate the sizes. This process continues until the parasitics change only little. Unlike OASYS, the authors separated the sizing method from the model of the transistor. This means one is able to use any transistor model to size the transistors, and, because the method does not use simulation and so makes less calls of the model equations, the model used can be more complicated than that used for simulation.<<ETX>>
International Journal of Electrical Engineering Education | 1991
Les T. Walczowski; Winston A.J. Waller; E. Wells
Teaching VSLI design using ChipWise ChipWise is a design system for VLSI circuits developed at the University of Kent, based on tools which originated at several academic institutions and tools obtained from industry. From 1st August, 1990, ChipWise will be included as a supported package within the software portfolio offered by the U.K. Higher Education ECAD Initiative. This paper describes the design tools and their application in a typical laboratory exercise.