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Dive into the research topics where Kallol Chatterjee is active.

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Featured researches published by Kallol Chatterjee.


custom integrated circuits conference | 2017

A 0.5V supply, 49nW band-gap reference and crystal oscillator in 40nm CMOS

Abhirup Lahiri; Pradeep Kumar Badrathwal; Nitin Jain; Kallol Chatterjee

This paper presents the co-design of 0.5V operational band-gap reference (BGR) and 32kHz crystal oscillator (XO) in 40nm CMOS process. The proposed BJT-based BGR offers 10× resistor area reduction compared to the conventional BGR. The proposed XO provides trans-conductance enhancement without the need for large coupling capacitor and uses a feedback loop to regulate its bias current, oscillation amplitude across PVT. The total power consumption is less than 49nW from −40°C to 120°C. Without any trimming, the BGR achieves temperature coefficients of 8ppm/°C and XO has temperature coefficient of 0.25ppm/°C. The BGR offers 5× lower area, 2× lower power consumption at 120°C compared to prior work on resistor-based, non-duty cycled BGR. The XO improves power consumption by at least 2× compared to prior work at 120°C, 0.5V supply.


Archive | 2005

Temperature compensated reference current generator

Kallol Chatterjee; Samala Sreekiran


Archive | 2011

Fail safe adaptive voltage/frequency system

Nitin Chawla; C. Parthasarathy; Kallol Chatterjee; Promod Kumar


Archive | 2005

On-chip voltage regulator

Kallol Chatterjee; Nitin Agarwal


Archive | 2007

System and method for an automatic coarse tuning of a voltage controlled oscillator in a phase-locked loop (PLL)

Kallol Chatterjee


Archive | 2013

System and method for variable frequency clock generation

Kallol Chatterjee; Nitin Agarwal; Junaid Yousuf; Nitin Gupta; Pierre Dautriche


Archive | 2007

Compensated output buffer for improving slew control rate

Vijender Singh Chauhan; Kallol Chatterjee; Paras Garg


Archive | 2005

VCO buffer circuit

Kallol Chatterjee; Samala Sreekiran


Archive | 2008

System and method for fast re-locking of a phase locked loop circuit

Kallol Chatterjee; Tanmoy Sen


Archive | 2007

Phase locked loop (PLL) method and architecture

Kallol Chatterjee; Nitin Agarwal

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