Kanna Shimizu
IBM
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Publication
Featured researches published by Kanna Shimizu.
design automation conference | 2006
Kanna Shimizu; Sanjay Gupta; Tatsuya Koyama; Takashi Omizo; Jamee Abdulhafiz; Larry McConville; Todd Swanson
Successfully developing an implementation of entirely new chip architecture such as the Cell Broadband Enginetrade (Cell BE) processor from scratch is a notable achievement. Consider further the design complexity (234 million transistors) and the project management complexity (5 participating companies, work in 5 different time zones), and the task seems quite challenging. This paper describes how the central verification team staffed by Sony Computer Entertainment Inc. (SCEI), Toshiba Corporation, and IBM, produced on first silicon a cell BE microprocessor functional enough to boot an operating system and run applications
computer and communications security | 2009
Masana Murase; Kanna Shimizu; Wilfred E. Plouffe; Masaharu Sakamoto
This paper presents the design and implementation of the Cell Broadband Engine TM(Cell/B.E.) isolation loader which is a part of the IBM Software Development Kit for Multicore Acceleration [14]. Our isolation loader is a key component in realizing secure application boot and encrypted application execution. During the application load process, the isolation loader fetches, validates, and decrypts a Synergistic Processor Element (SPE) executable, establishing a chain of trust from the hardware to the application. Since not all applications are SPE executables, we also introduce a general solution. This is a verification service framework in which all applications including system functions can be verified by the isolation loader immediately before execution. We have applied several novel implementation techniques to the isolation loader. The countermeasure implemented in our isolation loader against the substituted-ciphertext attack is given and our staging technique to allocate contiguous working areas for applications is also introduced. The load overhead of this loader including application fetch, validation (RSA-2048/SHA-1), and decryption (RSA-2048 and AES) is less than 50 milliseconds on the 2.8 GHz IBM PowerXCell 8i processor. This overhead is reasonable compared with the 500-millisecond 2048-bit RSA signing needed by the Trusted Platform Module chips [3].
design automation conference | 2006
Kanna Shimizu; Sanjay Gupta; Tatsuya Koyama; Takashi Omizo; Jamee Abdulhafiz; L. McConville; Todd Swanson
Successfully developing an implementation of entirely new chip architecture such as the Cell Broadband Engine/spl trade/ (Cell BE) processor from scratch is a notable achievement. Consider further the design complexity (234 million transistors) and the project management complexity (5 participating companies, work in 5 different time zones), and the task seems quite challenging. This paper describes how the central verification team staffed by Sony Computer Entertainment Inc. (SCEI), Toshiba Corporation, and IBM, produced on first silicon a cell BE microprocessor functional enough to boot an operating system and run applications.
Archive | 2006
Mark Richard Nutter; Kanna Shimizu
Archive | 2007
Masana Murase; Wilfred E. Plouffe; Kanna Shimizu; Vladimir Zbarsky
Archive | 2006
Akiyuki Hatakeyama; Harm Peter Hofstee; Kanna Shimizu
Archive | 2007
Masana Murase; Masaharu Sakamoto; Kanna Shimizu; Vladimir Zbarsky
Archive | 2007
Masana Murase; Wilfred E. Plouffe; Kanna Shimizu; Masaharu Sakamoto; Vladimir Zbarsky
Archive | 2007
Wilfred E. Plouffe; Kanna Shimizu; Vladimir Zbarsky
Archive | 2006
Mark Richard Nutter; Kanna Shimizu