Kapil Kesarwani

Resonant Switched-Capacitor Converters for Sub-module Distributed Photovoltaic Power Management

This paper discusses the theory and implementation of a class of distributed power converters for photovoltaic (PV) energy optimization. Resonant switched-capacitor converters are configured in parallel with strings of PV cells at the sub-module level to improve energy capture in the event of shading or mismatch. The converters operate in a parallel-ladder architecture, enforcing voltage ratios among strings of cells at terminals normally connected to bypass diodes. The balancing function extends from the sub-module level to the entire series string through a dual-core cable and connector. The parallel configuration allows converters to handle only mismatch power and turn off if there is no mismatch in the array. Measurement results demonstrate insertion loss below 0.1% and effective conversion efficiency above 99% for short-circuit current mismatch gradients up to 40%. The circuit implementation eliminates large power magnetic components, achieving a vertical footprint less than 6 mm. The merits of a resonant topology are compared to a switched-capacitor topology.

A Resonant Switched-Capacitor IC and Embedded System for Sub-Module Photovoltaic Power Management

The viability of grid-connected photovoltaic (PV) energy has improved dramatically in recent years: large increases in manufacturing capacity have driven reductions in cost and higher efficiencies, improving lifetime cost of energy (LCOE). Mismatch loss remains an important consideration in PV systems and a range of power electronic solutions have been proposed to recover losses due to shading, dust/debris, factory mismatch and aging. This paper presents a high-voltage CMOS IC and embedded system based on a resonant switched-capacitor converter. The solution is integrated into the junction box to balance power flow in parallel with sub-module strings of PV cells. A custom dual-core cable and connector extend the balancing function to multiple PV modules connected in series, improving energy production of large-scale PV arrays in the case of shading or mismatch. The converter is based on a resonant switched-capacitor (ReSC) topology that achieves effective conversion efficiency over 99% for a wide range of mismatch, insertion loss below 0.1%, a vertical footprint less than 6 mm, and weight less than 1 Oz.

Resonant-Switched Capacitor Converters for Chip-Scale Power Delivery: Design and Implementation

There is an increasing need for power management systems that can be fully integrated in silicon to reduce cost and form factor in mobile applications, and provide point-of-load voltage regulation for high-performance digital systems. Switched-capacitor (SC) converters have shown promise in this regard due to relatively high energy-density of capacitors and favorable device utilization figures of merit. Resonant switched-capacitor (ReSC) converters show similar promise as they benefit from many of the same architectures and scaling trends, but also from ongoing improvements in mm-scale magnetic devices. In this study, we explore the design and optimization of 2:1 step-down topologies, based on representative capacitor technologies, CMOS device parameters, and air-core inductor models. We compare the SC approach to the ReSC approach in terms of efficiency and power density. Finally, a chip-scale ReSC converter is presented that can deliver over 4 W at 0.6 W/mm2 with 85% efficiency. The two-phase, nominally 2:1 converter supports input voltages from 3.6-6.0 V, and is implemented in 180-nm bulk CMOS with die-attached air-core solenoid inductors.

A high-voltage CMOS IC and embedded system for distributed photovoltaic energy optimization with over 99% effective conversion efficiency and insertion loss below 0.1%

Solar photovoltaic (PV) energy has increased in importance in recent years as a viable alternative to carbon-producing sources of energy. In an effort to drive PV energy towards grid parity, there is a need to improve the power electronics and architecture for grid-connected systems. Traditional PV systems use a central inverter to manage multiple strings of series-connected PV modules. With mismatch among the PV cells, the energy production of the array suffers in several ways: 1) in series strings, current is limited to the lowest-performing cell in the string, 2) if current is forced to exceed this level, external bypass diodes need to turn on throwing away power available in the string and incurring conductive losses, 3) with bypass diodes on, total string voltage may deviate from maximum power voltage (Vmpp), reducing energy production of all modules in the string.

20.2 A variable-conversion-ratio 3-phase resonant switched capacitor converter with 85% efficiency at 0.91W/mm 2 using 1.1nH PCB-trace inductors

Switched-capacitor (SC) converters have shown significant promise for monolithic integration in a variety of mobile computing applications due to the relatively high energy-densities of modern capacitor technologies and the emergence of deep-trench technology [1-4]. Compared to more traditional buck and boost topologies, the SC approach provides better utilization of active and passive components, and is especially favorable when using submicron or deep-submicron CMOS technology because low-voltage devices can be configured in cascaded or hierarchical structures to interface across wide conversion ratios [5].

Resonant and multi-mode operation of flying capacitor multi-level DC-DC converters

Multi-level converter architectures have been explored for a variety of applications including high-power DC-AC inverters and DC-DC converters. In this work, we explore flying-capacitor multi-level (FCML) DC-DC topologies as a class of hybrid switched-capacitor/inductive converter. Compared to other candidate architectures in this area (e.g. Series-Parallel, Dickson), FCML converters have notable advantages such as the use of single-rated low-voltage switches, potentially lower switching loss, lower passive component volume, and enable regulation across the full VDD-VOUT range. It is shown that multimode operation, including previously published resonant and dynamic off-time modulation, form a single set of techniques that can be used to extend high efficiency over a wide power density range. Some of the general operating considerations of FCML converters, such as the challenge of maintaining voltage balance on flying capacitors, are shown to be of equal concern in other soft-switched SC converter topologies. Experimental verification from a 24V:12V, 3-level converter is presented to show multimode operation with a nominally 2:1 topology. A second 50V:7V 4-level FCML converter demonstrates operation with variable regulation. A method is presented to balance flying capacitor voltages through low frequency closed-loop feedback.

A coupled-inductor multi-level ladder converter for sub-module PV power management

The viability of solar photovoltaic energy has increased in recent years due to continuing efficiency improvements and cost reductions. However, there remains a need for improvements in power electronic circuits and architectures, especially to deal with sources of mismatch loss in real-world environments. This work presents a circuit implementation and multi-objective control scheme for a four-level DC-DC converter that provides sub-module energy optimization for photovoltaic systems. The work builds on past approaches using switched-inductor (SL) topologies that manage power flow in parallel with series-connected PV strings. We describe the use of coupled-magnetics to reduce current ripple and improve efficiency compared to past SL approaches. The converter works by enforcing voltage ratios among adjacent PV sub-strings, allowing independent sub-module maximum power point tracking (MPPT). A state-space model of the switched-inductor topology is presented to provide a foundation for a PI control scheme. Circuit simulations are compared to measurement results for a four-stage prototype integrated in the junction-box of a 245 Wp PV module.

A multi-level ladder converter supporting vertically-stacked digital voltage domains

Modern digital systems are severely constrained by both battery life and operating temperatures, resulting in strict limits on total power consumption and power density. To continue to scale digital throughput at constant power density, there is a need for increasing parallelism and dynamic voltage/bias scaling. This work presents an architecture and power converter implementation providing efficient power-delivery for microprocessors and other high-performance digital circuits stacked in vertical voltage domains. A multi-level DC-DC converter interfaces between a fixed DC voltage and multiple 0.7 V to 1.4 V voltage domains stacked in series. The converter implements dynamic voltage scaling (DVS) with multi-objective digital control implemented in an on-board (embedded) digital control system. We present measured results demonstrating functional multi-core DVS and performance with moderate load current steps. The converter demonstrates the use of a two-phase interleaved powertrain with coupled inductors to achieve voltage and current ripple reduction for the stacked ladder-converter architecture.

4.5 A 2-phase resonant switched-capacitor converter delivering 4.3W at 0.6W/mm 2 with 85% efficiency

In this work, we present a 2-phase ReSC converter that operates with supply voltages from 3.6 to 6V, providing compatibility for a range of applications including Li-Ion battery supplies. Figure 4.5.2 shows the power train of the 2-phase ReSC converter. The architecture is similar to the 2:1 SC converters in [2-3], but uses inductance, L_X, to resonate with the on-chip flying capacitor, C_X. On-chip bypass capacitance, C_bp, is used to filter the output voltage and complete the resonant loop in the energy transfer process. The timing of key signals in converter operation is shown in Fig. 4.5.3. In normal operation at the fundamental resonant frequency, ω_o=(L_XC_X)^-1/2, resonant impedance Z_X is configured in parallel with Vin-Vout in φ₁; in φ₂, Z_X is configured in parallel with Vout. If there is a voltage difference between Vin-Vout and Vout-GND, voltage V_X appears as a square wave at the resonant frequency. In φ₁, a positive half wave current flows into Z_X, drawing energy from Vin; in φ₂, a negative half wave current flows out of Z_X, supplying energy to the load. Similar to the SC topology, this process can be modeled as an effective resistance, REFF, the details of which are discussed in [6]. Operation at the fundamental mode provides the lowest achievable R_EFF, which is approximately R_ESR·π²/8 for the 2:1 configuration, near the minimum achievable R_EFF for a comparable SC converter.

Resonant switched-capacitor converters for chip-scale power delivery: Modeling and design

There is an increasing need for power management systems that can be fully integrated in silicon to reduce cost and form factor in mobile applications, and provide on-chip voltage regulation for high-performance digital systems. Switched-capacitor (SC) converters have shown tremendous promise in this regard due to favorable device utilization and scaling trends, and the emergence of high-density silicon-compatible capacitor technologies. Resonant switched-capacitor (ReSC) converters show similar promise as they benefit from the same architectures, scaling, and component trends, but also from ongoing improvements in silicon-integrated magnetic components. In this work, we explore the design and optimization of ReSC step down topologies, based on representative capacitor technologies, CMOS device parameters, and a range of possible integrated magnetics specifications.