Christopher Schaef

20.2 A variable-conversion-ratio 3-phase resonant switched capacitor converter with 85% efficiency at 0.91W/mm 2 using 1.1nH PCB-trace inductors

Switched-capacitor (SC) converters have shown significant promise for monolithic integration in a variety of mobile computing applications due to the relatively high energy-densities of modern capacitor technologies and the emergence of deep-trench technology [1-4]. Compared to more traditional buck and boost topologies, the SC approach provides better utilization of active and passive components, and is especially favorable when using submicron or deep-submicron CMOS technology because low-voltage devices can be configured in cascaded or hierarchical structures to interface across wide conversion ratios [5].

Multilevel Power Point Tracking for Partial Power Processing Photovoltaic Converters

This paper presents a multilevel control and maximum power point tracking (MPPT) scheme for variable conversion ratio partial power processing photovoltaic (PV) dc-dc converters. A general system model is derived and linearized in state-space form for a switched-inductor (buck-boost dc-dc) converter with an arbitrary number of series-connected stages. The proposed control law is then used as the basis for a multilevel MPPT scheme that can optimize many series-connected PV cells, substrings, or modules simultaneously. The MPPT algorithm is shown to converge in a timeframe independent of the number of PV units and can work in concert with the central inverter MPPT algorithm without conflict. To validate the control and optimization scheme, we present a hardware prototype designed to fit in the junction box of conventional PV modules, operating at the submodule level. While the control law is developed specifically for the buck-boost topology, the MPPT algorithm is generalized and could be applied to many partial-power processing topologies provided there is capability to regulate the voltage differences or voltage ratios among adjacent PV stages.

A coupled-inductor multi-level ladder converter for sub-module PV power management

The viability of solar photovoltaic energy has increased in recent years due to continuing efficiency improvements and cost reductions. However, there remains a need for improvements in power electronic circuits and architectures, especially to deal with sources of mismatch loss in real-world environments. This work presents a circuit implementation and multi-objective control scheme for a four-level DC-DC converter that provides sub-module energy optimization for photovoltaic systems. The work builds on past approaches using switched-inductor (SL) topologies that manage power flow in parallel with series-connected PV strings. We describe the use of coupled-magnetics to reduce current ripple and improve efficiency compared to past SL approaches. The converter works by enforcing voltage ratios among adjacent PV sub-strings, allowing independent sub-module maximum power point tracking (MPPT). A state-space model of the switched-inductor topology is presented to provide a foundation for a PI control scheme. Circuit simulations are compared to measurement results for a four-stage prototype integrated in the junction-box of a 245 Wp PV module.

A multi-level ladder converter supporting vertically-stacked digital voltage domains

Modern digital systems are severely constrained by both battery life and operating temperatures, resulting in strict limits on total power consumption and power density. To continue to scale digital throughput at constant power density, there is a need for increasing parallelism and dynamic voltage/bias scaling. This work presents an architecture and power converter implementation providing efficient power-delivery for microprocessors and other high-performance digital circuits stacked in vertical voltage domains. A multi-level DC-DC converter interfaces between a fixed DC voltage and multiple 0.7 V to 1.4 V voltage domains stacked in series. The converter implements dynamic voltage scaling (DVS) with multi-objective digital control implemented in an on-board (embedded) digital control system. We present measured results demonstrating functional multi-core DVS and performance with moderate load current steps. The converter demonstrates the use of a two-phase interleaved powertrain with coupled inductors to achieve voltage and current ripple reduction for the stacked ladder-converter architecture.

Multilevel Power-Point-Tracking for Variable-Conversion-Ratio Photovoltaic Ladder Converters

Despite recent market conditions and significant consolidation among photovoltaic (PV) module and cell manufacturers, the widespread deployment of PV technologies is increasingly viable. Recent advances in power electronics systems include the emergence of sub-module partial-power processing architectures based on multi-level ladder converters. This work presents a control scheme and a multiple-input, multiple-output (MIMO) maximum power point tracking (MPPT) algorithm suitable for large PV arrays controlled by series-connected modular multi-level converters. We demonstrate stability of the control system experimentally on a four-level prototype and simulation results that show convergence to global optimum conditions in less than 20 perturb-and-observe cycles for up to 300 series-connected PV substrings.

Efficient Voltage Regulation for Microprocessor Cores Stacked in Vertical Voltage Domains

Due to exponential (Moores law) scaling of advanced CMOS technologies, the challenges associated with delivering power to performance and mobile computing systems are outpacing the capabilities of conventional voltage regulator (VR) topologies. To continue to scale throughput at constant power density, the level of parallelism in microprocessor architectures is expected to increase substantially. In this paper, we present a power conversion topology to provide independent multicore regulation in the 0.8-1.4 V range from a 12-V dc bus. The topology uses a multistage ladder converter to manage power delivery to digital circuits stacked in vertical voltage domains. This approach has several advantages with regard to systems efficiency as it allows a more moderate conversion ratio of the main dc-dc converter. Moreover, the parallel converter only needs to process a fraction of the power of each core as the current can be “recycled” by adjacent cores in the stack. We develop a dynamical model for a multiple-input, multiple-output control scheme that uses a simple integral-control law, augmented with fast voltage- and current-mode feedforward. Measurement results of a discrete prototype verify the control scheme and demonstrate the potential advantages in system efficiency but also emphasize the remaining challenges in meeting stringent VR dynamic response requirements.

Equivalent resistance approach to optimization, analysis and comparison of hybrid/resonant switched-capacitor converters

This work develops a generalized output impedance model for switched-capacitor (SC) and hybrid-resonant switched-capacitor dc-dc converters that is scalable across conversion ratios and frequencies. This model builds on previous analytical treatments of SC and ReSC converters, but is expanded to derive optimizations that include both conduction and switching loss and help distinguish the regimes in which the hybrid approach is favorable when including the additional losses and volumetric overhead of the inductor. Importantly, the models also consider an expanded set of possible operating modes that span continuous and discontinuous conduction in addition to nominal resonant operation. Across the range of operation, the output impedance (Reff) for hybrid/resonant operation is shown to have a qualitative similarity to the SC case, except an improvement by the quality factor of the resonant loop in a given phase.

A Scalable Active Battery Management System With Embedded Real-Time Electrochemical Impedance Spectroscopy

Electrochemical energy storage is critical for a range of applications spanning electrified transportation and grid energy storage, and there is a need to further improve both the active management and diagnostic capability of current battery management systems. Lithium-based battery chemistries have been favored for their high energy and power densities but require precise management to prevent premature degradation and failure. This work presents an efficient power converter (based on a switched-inductor ladder topology), instrumentation, and an embedded control platform that can provide both active balancing and real-time diagnostic capability through electrochemical impedance spectroscopy (EIS). A digital proportional-integral controller enforces sinusoidal reference signals from a direct digital synthesizer, enabling the power converter to perturb the cells and extract their impedance. Cell-level diagnostics allow for noninvasive measurement of physical electrochemical battery properties that can be used to assess the state of charge and state of health of a battery. A ladder converter prototype was implemented on a printed circuit board to perform EIS on two Panasonic 18650 cells in series. Experimental results showed balancing converter efficiency of 95%, and the accuracy of the prototype was validated through comparison to a state-of-the-art commercial benchtop system.

A 3-Phase Resonant Switched Capacitor Converter Delivering 7.7 W at 85% Efficiency Using 1.1 nH PCB Trace Inductors

In recent years, there has been a push towards high-density and monolithic DC-DC converters to support applications such as performance and mobile computing, consumer electronics, and renewable energy. Switched capacitor (SC) converters have started to gain traction for a number of these applications, but are still subject to fundamental limitations that drive them towards expensive process options and high switching frequencies. Variable regulation is challenging with the SC approach, and comes at the cost of lower power density and efficiency. This work presents a resonant switched capacitor (ReSC) topology that addresses some of these challenges by introducing a small amount of inductance in series with the flying capacitor, eliminating charge-sharing losses and thus allowing efficient operation in a low-cost process option. The three-phase interleaved topology can deliver up to 7.7 W at 85% efficiency (power density of 0.91 W/mm 2 or 6.4 kW/in 3) using a bootstrapped n-channel power train and single-digit nH inductors embedded in a flip-chip assembly. We also present the first implementation of efficient, fully-variable conversion ratios in a silicon ReSC integrated circuit without reconfiguration or gain-hopping .

Inductor design for low loss with complex waveforms

An inductor design which uses solid and litz wire in order to attain high efficiency for waveforms with low- and high-frequency components is presented. In previous designs, leakage inductance can increase the portion of the low-frequency component that flows in the litz-wire winding, and thus increase loss. A capacitor in series with the litz-wire winding is proposed to eliminate this effect. An inductor prototype has been built and measurement results verify the benefits of the proposed concept. Both model results and measurements show that loss can be reduced by as much as 20% through adding the capacitor or by 30% compared to a solid-wire winding alone. For design optimization including cost considerations a software tool has been written in MATLAB based on the derived loss model offering a simple step-by-step process for designers.