Karim Allidina

A Highly Integrated 1.8 GHz Frequency Synthesizer Based on a MEMS Resonator

A highly integrated 1.7-2.0 GHz digitally programmable frequency synthesizer using a MEMS resonator as its reference is presented. Due to the dimensions of the MEMS device (e.g., 25 mum by 114 mum), the entire system with a total area of 6.25 mm2 can be housed in a small standard chip package. This considerably reduces the form factor and cost of the system, compared to using an external crystal as a reference. The MEMS resonators are clamped-clamped beams fabricated using a CMOS-compatible process. The main structural layer is made of silicon carbide, which provides the resonators with higher power handling capabilities and higher operating frequencies, compared to silicon. The resonators are electrostatically and thermally tunable - an 8.4% frequency tuning is demonstrated for a 9 MHz resonator. The 100 nm vertical transducer gaps of the resonators allow the use of electrostatic actuation voltages as low as 2 V. An integrated high gain-bandwidth trans-impedance amplifier (TIA) is combined with a resonator to generate the synthesizers input reference signal. The TIA employs automatic gain control to mitigate the inherent low power handling capabilities and the non-linearities of the MEMS device, thus minimizing their effect on phase noise. The fractional- N synthesizer employs a 3rd-order 20-bit delta-sigma modulator to deliver a theoretical output resolution of ~ 11 Hz, in order to allow for high output frequency stability when used with an appropriate feedback loop. A fully integrated on-chip dual path loop filter is used to maintain a high level of system integration. With a supply voltage of 2 V, the phase noise for a 1.8 GHz output frequency and a ~12 MHz reference signal is -122 dBc/Hz at a 600 kHz offset, and -137 dBc/Hz at a 3 MHz offset.

A Sub-mW, Ultra-Low-Voltage, Wideband Low-Noise Amplifier Design Technique

This paper presents a design methodology for an ultra-low-power (ULP) and ultra-low-voltage (ULV) ultra-wideband (UWB) resistive-shunt feedback low-noise amplifier (LNA). The ULV circuit design challenges are discussed and a new biasing metric for ULV and ULP designs in deep-submicrometer CMOS technologies is introduced. Series inductive peaking in the feedback loop is analyzed and employed to enhance the bandwidth and noise performance of the LNA. Exploiting the new biasing metric, the design methodology, and series inductive peaking in the feedback loop, a 0.5 V, 0.75-mW broadband LNA with a current reuse scheme is implemented in a 90-nm CMOS technology. Measurement results show 12.6-dB voltage gain, 0.1-7-GHz bandwidth, 5.5-dB NF, -9-dBm IIP3, and -18-dB P1dB while occupying 0.23 mm2.

An Ultra-Low-Power Wideband Inductorless CMOS LNA With Tunable Active Shunt-Feedback

This work presents and analyzes the design of a 1-V ultra-low power, compact, and wideband low-noise amplifier (LNA). The proposed LNA uses common-gate (CG) NMOS and PMOS transistors as input devices in a complementary current-reuse structure. Low power input matching is achieved by employing an active shunt-feedback architecture while the current of the feedback stage is also reused by the input transistor to improve the current efficiency of the LNA. A forward body biasing (FBB) scheme is exploited to tune the feedback coefficient. The complementary characteristics of the input stage leads to partial second-order distortion cancellation. The proposed inductorless LNA is implemented in an IBM 0.13-μm 1P8M CMOS technology and occupies only 0.0052 mm2. The measured LNA has a 12.3-dB gain 4.9-dB minimum noise figure (NF) input referred third-order intercept point (IIP3) of -10 dBm and 0.1-2.2-GHz bandwidth (BW), while consuming only 400 μA from a 1-V supply.

Short Channel Output Conductance Enhancement Through Forward Body Biasing to Realize a 0.5 V 250

This work examines the use of a forward body biasing (FBB) scheme to mitigate output conductance degradation due to short channel effects in ultra-low voltage (ULV) circuits with no additional power consumption. It is shown that FBB boosts the output resistance of a transistor such that the intrinsic gain reduction due to low-supply voltages can be compensated. This technique is then used to implement a low-noise amplifier (LNA) tailored for ultra-low power (ULP) and ULV applications. The proposed LNA uses common-gate (CG) NMOS transistors as input devices in a complementary current-reuse structure. Low-power input matching is achieved by employing an active shunt-feedback architecture while the current of the feedback stage is also reused by the input transistor. Moreover, a separate FBB scheme is exploited to tune the feedback coefficient. An inductive gm-boosting technique is used to increase the bandwidth of the LNA without additional power consumption. The proposed LNA is implemented in an IBM 0.13 μm 1P8M CMOS technology and occupies 0.39 mm2. The measured LNA has a 14 dB gain, 4 dB minimum noise figure, IIP3 of -10 dBm, and 0.6-4.2 GHz bandwidth, while consuming only 500 μA from a 0.5 V supply. The LNA operates with supplies as low as 0.4 V while maintaining good performance.

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This paper presents a surface-micromachining technology to fabricate silicon carbide (SiC)-based capacitive micromachined ultrasonic transducers (CMUTs). The use of dc-sputtered amorphous SiC as a structural layer allows the fabrication process to limit the temperature to a thermal budget of 200 °C, which is the lowest reported to date, making this technology ideally suited for above-IC integration. The high Youngs modulus of the deposited SiC film, along with its very low residual stress, results in high strength and resilient CMUT membranes. The placement of the suspended aluminum electrode directly at the bottom side of the membrane reduces the effective size of the electrostatic transduction gap, resulting in superior electro-mechanical coupling. Fabricated transducers are tested in air with both continuous-wave and pulsed signals, using a pitch-and-catch configuration. The transducer pair, composed of 110-μm-diameter membrane arrays, exhibits a resonant frequency of 1.75 MHz, a 3 dB-bandwidth of 0.15 MHz, and a transmission gain of -38 dB. The CMUT prototypes showcase the versatility of low-temperature dc-sputtered SiC films applied in the field of MEMS.

0.6–4.2 GHz Current-Reuse CMOS LNA

This paper presents a 1.65-2.0 GHz digitally programmable oscillator. The oscillator is based on a MEMS resonator combined with a high-resolution 0.18 mum CMOS fractional-N PLL. Due to the dimensions of the MEMS resonator (350 mum times 130 mum), the size of the entire system is ~6.05 mm2, and can be integrated into a single small form factor package. The phase noise for an oscillation frequency of 1.8 GHz is -116 dBc/Hz at a 600 kHz offset, and the entire system consumes 50 mW from a 2 V supply. The PLL employs a 3rd-order 20-bit delta-sigma modulator to deliver an output resolution of ~220 Hz, i.e. enabling a controlled frequency stability of better than 0.125 ppm.

Surface-Micromachined CMUT Using Low-Temperature Deposited Silicon Carbide Membranes for Above-IC Integration

An electronic system for temperature compensation of MEMS resonators is proposed. The system is based on a dual resonator compensation technique using thermal feedback. It allows for the implementation of a fully integrated solution, while minimizing the complexity of the compensation circuitry. Design methodologies are introduced along with analysis equations. The circuitry is implemented in 0.18 µm CMOS technology. The system exhibits a simulated temperature stability of ±0.74 ppm over a -45 °C to 85 °C temperature range, and has a power consumption of 181 mW.

A compact and programmable high-frequency oscillator based on a MEMS resonator

This work presents a convenient and versatile prototyping method for integrating surface-micromachined microelectromechanical systems (MEMS) directly above IC electronics, at the die level. Such localized implementation helps reduce development costs associated with the acquisition of full-sized semiconductor wafers. To demonstrate the validity of this method, variants of an IC-compatible surface-micromachining MEMS process are used to build different MEMS devices above a commercial transimpedance amplifier chip. Subsequent functional assessments for both the electronics and the MEMS indicate that the integration is successful, validating the prototyping methodology presented in this work, as well as the suitability of the selected MEMS technology for above-IC integration.

Electronic temperature compensation of clamped-clamped beam MEMS resonators

This paper presents an ultra low power, low voltage, high gain squarer circuit for use in non-coherent impulse radio ultra wideband (IR-UWB) receivers. The proposed squaring function is implemented based on the intrinsic CMOS transistor characteristics in the sub-threshold region, where the second-order derivative of the drain current is maximized. Additionally, a capacitor cross-coupling gm boosting technique is exploited to increase the conversion gain of the squarer. Utilizing the aforementioned schemes, a low power and high gain squarer is realized in a TSMC 90nm CMOS technology. Simulation results demonstrate that the proposed squarer covers the UWB bandwidth and provides 16dB of RMS conversion gain at the input signal level of 100mV, while drawing only 320μA from a 0.5V power supply.

A novel prototyping method for die-level monolithic integration of MEMS above-IC

This paper presents a MEMS resonator-based vacuum sensor with a low-power transimpedance amplifier and a mixer-based frequency-to-digital converter. The MEMS resonator is fabricated in a CMOS-compatible process, and a 130 nm CMOS technology is used to design the integrated circuitry. The vacuum sensor operates in the pressure range from 10 to 1200 mbar with a resolution of ~2 mbar. The system is temperature-compensated between −10°C and 60°C. The simulated power consumption of the entire system is less than 495 μW from a 1 V supply.