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Dive into the research topics where Karthick Rajamani is active.

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Featured researches published by Karthick Rajamani.


IEEE Computer | 2003

Energy management for commercial servers

Charles R. Lefurgy; Karthick Rajamani; Freeman L. Rawson; Wesley M. Felter; Michael Kistler; Tom W. Keller

Servers: high-end, multiprocessor systems running commercial workloads, have typically included extensive cooling systems and resided in custom-built rooms for high-power delivery. Recently, as transistor density and demand for computing resources have rapidly increased, even these high-end systems face energy-use constraints. Commercial-server energy management now focuses on conserving power in the memory and microprocessor subsystems. Because their workloads are typically structured as multiple application programs, system-wide approaches are more applicable to multiprocessor environments in commercial servers than techniques that primarily apply to single-application environments, such as those based on compiler optimizations.


international conference on supercomputing | 2005

A performance-conserving approach for reducing peak power consumption in server systems

Wesley M. Felter; Karthick Rajamani; Tom W. Keller; Cosmin Rusu

The combination of increasing component power consumption, a desire for denser systems, and the required performance growth in the face of technology-scaling issues are posing enormous challenges for powering and cooling of server systems. The challenges are directly linked to the peak power consumption of servers.Our solution, Power Shifting, reduces the peak power consumption of servers minimizing the impact on performance. We reduce peak power consumption by using workload-guided dynamic allocation of power among components incorporating real-time performance feedback, activity-related power estimation techniques, and performance-sensitive activity-regulation mechanisms to enforce power budgets.We apply our techniques to a computer system with a single processor and memory. Power shifting adds a system power manager with a dynamic, global view of the systems power consumption to continuously re-budget the available power amongst the two components. Our contributions include:• Demonstration of the greater effectiveness of dynamic power allocation over static budgeting,• Evaluation of different power shifting policies,• Analysis of system and workload factors critical to successful power shifting, and• Proposal of performance-sensitive power budget enforcement mechanisms that ensure system reliability.


international symposium on performance analysis of systems and software | 2003

On evaluating request-distribution schemes for saving energy in server clusters

Karthick Rajamani; Charles R. Lefurgy

Power-performance optimization is a relatively new problem area particularly in the context of server clusters. Power-aware request distribution is a method of scheduling service requests among servers in a cluster so that energy consumption is minimized, while maintaining a particular level of performance. Energy efficiency is obtained by powering-down some servers when the desired quality of service can be met with fewer servers. We have found that it is critical to take into account the system and workload factors during both the design and the evaluation of such request distribution schemes. We identify the key system and workload factors that impact such policies and their effectiveness in saving energy. We measure a web cluster running an industry-standard commercial web workload to demonstrate that understanding this system-workload context is critical to performing valid evaluations and even for improving the energy-saving schemes.


Ibm Journal of Research and Development | 2007

System power management support in the IBM POWER6 microprocessor

Michael Stephen Floyd; Soraya Ghiasi; Tom W. Keller; Karthick Rajamani; Freeman L. Rawson; Juan C. Rubio; Malcolm Scott Ware

The IBM POWER6™ microprocessor chip supports advanced, dynamic power management solutions for managing not, just the chip but the entire server. The design facilitates a programmable power management solution for greater flexibility and integration into system- and data-center-wide management solutions. The design of the POWER6 microprocessor provides real-time access to detailed and accurate information on power, temperature, and performance. Together, the sensing, actuation, and management support available in the POWER6 processor, known as the EnergyScale™ architecture, enables higher performance, greater energy efficiency, and new power management capabilities such as power and thermal capping and power savings with explicit performance control. This paper provides an overview of the innovative design of the POWER6 processor that enables these advanced, dynamic system power management solutions.


high-performance computer architecture | 2010

Architecting for power management: The IBM® POWER7™ approach

Malcolm Scott Ware; Karthick Rajamani; Michael Stephen Floyd; Bishop Brock; Juan C. Rubio; Freeman L. Rawson; John B. Carter

The POWER7 processor is the newest member of the IBM POWER® family of server processors. With greater than 4X the peak performance and the same power budget as the previous generation POWER6®, POWER7 will deliver impressive energy-efficiency boosts. The improved peak energy-efficiency is accompanied by a wide array of new features in the processor and system designs that advance IBMs EnergyScale™ dynamic power management methodology. This paper provides an overview of these new features, which include better sensing, more advanced power controls, improved scalability for power management, and features to address the diverse needs of the full range of POWER servers from blades to supercomputers. We also highlight three challenges that need attention from a range of systems design and research teams: (i) power management in highly virtualized environments, (ii) power (in)efficiency of systems software and applications, and (iii) memory power costs, especially for servers with large memory footprints.


international symposium on microarchitecture | 2011

Introducing the Adaptive Energy Management Features of the Power7 Chip

Michael Stephen Floyd; Malcolm S. Allen-Ware; Karthick Rajamani; Bishop Brock; Charles R. Lefurgy; Alan J. Drake; Lorena Pesantez; Tilman Gloekler; Jose A. Tierno; Pradip Bose; Alper Buyuktosunoglu

Power7 implements several new adaptive power management techniques which, in concert with the EnergyScale firmware, let it proactively exploit variations in workload, environmental conditions, and overall system use to meet customer-directed power and performance goals. These innovative features include per-core frequency scaling with available autonomic frequency control, per-chip automated voltage slewing, power consumption estimation, and hardware instrumentation assist.


international symposium on microarchitecture | 2011

Scaling with Design Constraints: Predicting the Future of Big Chips

Wei Huang; Karthick Rajamani; Mircea R. Stan; Kevin Skadron

The past few years have witnessed high-end processors with increasing numbers of cores and larger dies. With limited instruction-level parallelism, chip power constraints, and technology-scaling limitations, designers have embraced multiple cores rather than single-core performance scaling to improve chip throughput. This article examines whether this approach is sustainable by scaling from a state-of-the-art big-chip design point using analytical models.


2011 International Green Computing Conference and Workshops | 2011

TAPO: Thermal-aware power optimization techniques for servers and data centers

Wei Huang; Malcolm S. Allen-Ware; John B. Carter; Elmootazbellah Nabil Elnozahy; Hendrik F. Hamann; Tom W. Keller; Charles R. Lefurgy; Jian Li; Karthick Rajamani; Juan C. Rubio

A large portion of the power consumption of data centers can be attributed to cooling. In dynamic thermal management mechanisms for data centers and servers, thermal setpoints are typically chosen statically and conservatively, which leaves significant room for improvement in the form of improved energy efficiency. In this paper, we propose two hierarchical thermal-aware power optimization techniques that are complementary to each other and achieve (i) lower overall system power with no performance penalty or (ii) higher performance within the same power budget.


international symposium on low power electronics and design | 2007

Thermal response to DVFS: analysis with an Intel Pentium M

Heather Hanson; Stephen W. Keckler; Soraya Ghiasi; Karthick Rajamani; Freeman L. Rawson; Juan C. Rubio

Increasing power density in computing systems from laptops to servers has spurred interest in dynamic thermal management. Based on the success of dynamic voltage and frequency scaling (DVFS) in managing power and energy, DVFS may be a viable option for thermal management, as well. However, publicly available data on the thermal effects of DVFS are very limited. In this work, we characterize the thermal response of Intel Pentium M system to DVFS, identifying the response timescale and influence of factors beyond voltage and frequency on processor temperature.


ieee international symposium on workload characterization | 2006

Application-Aware Power Management

Karthick Rajamani; Heather Hanson; Juan C. Rubio; Soraya Ghiasi; Freeman L. Rawson

This paper presents our approach for application-aware power management. We combine continuous monitoring of critical workload indicators, online power and performance model usage and timely p-state control to realize application-aware power management. We present two new power management solutions enabled by our methodology: PerformanceMaximizer (PM) finds the best possible performance under specified power constraints and PowerSave (PS) saves energy while keeping performance above specified requirements. We evaluate both using the SPEC-CPU2000 suite on a Pentium M platform discussing implications of workload characteristics and benefits of being workload-aware

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