Karthik Kadirvel
Texas Instruments
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Publication
Featured researches published by Karthik Kadirvel.
international solid-state circuits conference | 2012
Karthik Kadirvel; Yogesh K. Ramadass; Umar Jameer Lyles; John H. Carpenter; Vadim V. Ivanov; Vince McNeil; Anantha P. Chandrakasan; Brian Lum-Shue-Chan
Harvesting energy from ambient energy sources such as solar and thermal gradients is one solution to address the dramatic increase in energy consumption of personal electronics. In this paper, an ultra low quiescent current charger and battery management IC that can efficiently extract energy from solar panels and thermoelectric generators to charge batteries and super capacitors is presented. While previous works on energy harvesting [1-5] report efficient DC-DC converters to extract the energy from the harvester, not all of them provide complete battery management functionality for various chemistries. Also, maximum power point tracking (MPPT) which is critical in energy harvesting applications is not provided in some of the published work. In this paper, a charger and battery management IC with 330nA quiescent current is presented. The IC can cold start from 330mV and 5μW of input power. The charger achieves efficiency greater than 80% at single cell solar voltages of 0.5V. A low quiescent current battery management architecture involving sampled circuits, sub regulated rails and clock gating is demonstrated.
IEEE Journal of Solid-state Circuits | 2014
Karthik Kadirvel; John H. Carpenter; Phuong Huynh; John Michael Ross; Robert Shoemaker; Brian Lum-Shue-Chan
Battery monitoring systems are a critical aspect of electric vehicles. To interface with the high voltages in these systems a stacked IC approach is used. In this work we present an IC suitable for monitoring 6 cells which can be stacked to monitor a total of 192 cells. The IC has 13 parallel ΣΔ ADCs (12 bit, 5mV accuracy, better than 1.5mV matching) to measure individual cell voltages, cell temperature and battery current. Gate drivers with programmable frequency (5kHz - 2.048MHz), duty cycle and dither for active and passive cell balancing is provided. On chip 3.3V and 5.2V LDOs power the various subsystems. To eliminate external components, the ICs uses current mode signaling which allows the IC to be directly connected to one another to transmit information about cells from the top of the stack to the host. The IC consumes less than 15uA of quiescent current.
Archive | 2009
Brian Lum-Shue-Chan; Karthik Kadirvel; John H. Carpenter; Umar Jameer Lyles
Archive | 2010
Karthik Kadirvel; John H. Carpenter
Archive | 2009
Karthik Kadirvel; Umar Jameer Lyles; John H. Carpenter
Archive | 2013
Karthik Kadirvel; Steve Harrell; Brian Lum-Shue-Chan
Archive | 2009
Umar Jameer Lyles; Karthik Kadirvel; John H. Carpenter
Archive | 2009
Umar Jameer Lyles; Karthik Kadirvel; John H. Carpenter
publisher | None
author
symposium on vlsi circuits | 2013
Karthik Kadirvel; John H. Carpenter; Robert Shoemaker; John Werden Ross; Phuong Huynh; Brian Lum-Shue-Chan