Kasra Vakilinia

Enhanced Precision Through Multiple Reads for LDPC Decoding in Flash Memories

Multiple reads of the same Flash memory cell with distinct word-line voltages provide enhanced precision for LDPC decoding. In this paper, the word-line voltages are optimized by maximizing the mutual information (MI) of the quantized channel. The enhanced precision from a few additional reads allows frame error rate (FER) performance to approach that of full-precision soft information and enables an LDPC code to significantly outperform a BCH code. A constant-ratio constraint provides a significant simplification in the optimization with no noticeable loss in performance. For a well-designed LDPC code, the quantization that maximizes the mutual information also minimizes the FER in our simulations. However, for an example LDPC code with a high error floor caused by small absorbing sets, the MMI quantization does not provide the lowest frame error rate. The best quantization in this case introduces more erasures than would be optimal for the channel MI in order to mitigate the absorbing sets of the poorly designed code. The paper also identifies a trade-off in LDPC code design when decoding is performed with multiple precision levels; the best code at one level of precision will typically not be the best code at a different level of precision.

Protograph-Based Raptor-Like LDPC Codes

This paper proposes protograph-based Raptor-like (PBRL) codes as a class of rate-compatible low-density parity-check codes for binary-input AWGN channels. As with the Raptor codes, exclusive-OR operations on precoded bits produce additional parity bits providing extensive rate compatibility. Unlike Raptor codes, each additional parity bit in the protograph is explicitly designed to optimize the density evolution threshold. During the lifting process, approximate cycle extrinsic message degree (ACE) and circulant progressive edge growth (CPEG) constraints are used to avoid undesirable graphical structures. Some density-evolution performance is sacrificed to obtain lower error floors, particularly at short block-lengths. Simulation results are shown for information block sizes of k = 1032 and 16 384. For a target frame error rate of 10-5, at each rate, the k = 1032 and 16 384 code families perform within 1 dB and 0.4 dB of both the Gallager bound and the normal approximation, respectively. The 16 384 code family outperforms the best known standardized code family, namely, the AR4JA codes. The PBRL codes also outperform DVB-S2 codes that have the advantages of longer blocklengths and outer BCH codes. Performance is similar to RC code families designed by Nguyen et al. that do not constrain codes to have the PBRL structure and involve simulation in the optimization process at each rate.

Short-blocklength non-binary LDPC codes with feedback-dependent incremental transmissions

One advantage of feedback in a point-to-point memoryless channel is the reduction of the average blocklength required to approach capacity. This paper presents a communication system with feedback that uses carefully designed non-binary LDPC (NB-LDPC) codes and incremental transmissions to achieve 92-94% of the idealized throughput of rate-compatible sphere-packing with maximum-likelihood decoding (RCSP-ML) for average blocklengths of 150-450 bits. The system uses active feedback by carefully selecting each bit of additional incremental information to improve the reliability of the least reliable variable node. The system uses post processing in the decoder to further improve performance. The average blocklengths of 150-450 bits are small enough that feedback provides a throughput advantage but also large enough that overhead that might be associated with transmitter confirmation is more easily tolerated.

Design of high-rate irregular non-binary LDPC codes using algorithmic stopping-set cancellation

Following Poulliat et al.s design of (2, dc) nonbinary LDPC (NB-LDPC) codes, this paper designs high-rate irregular NB-LDPC codes by addressing the problem of minimum symbol distance. The design procedure first identifies all stopping sets up to weight five in an LDPC code and enumerates them via a message passing algorithm. For each identified stopping set, careful labeling forces its corresponding parity-check sub-matrix to be full rank, thereby preventing the stopping set from being a sub-code and ensuring a minimum distance of at least six symbols. Simulation results for codes designed through this procedure show a significant improvement in the error-floor region over randomized labeling.

Optimizing Transmission Lengths for Limited Feedback With Nonbinary LDPC Examples

This paper presents a general approach for optimizing the number of symbols in increments (packets of incremental redundancy) in a feedback communication system with a limited number of increments. This approach is based on a tight normal approximation on the rate for successful decoding. Applying this approach to a variety of feedback systems using nonbinary (NB) low-density parity-check (LDPC) codes shows that greater than 90% of capacity can be achieved with average blocklengths fewer than 500 transmitted bits. One result is that the performance with ten increments closely approaches the performance with an infinite number of increments. The paper focuses on binary-input additive-white Gaussian noise (BI-AWGN) channels but also demonstrates that the normal approximation works well on examples of fading channels as well as high-SNR AWGN channels that require larger QAM constellations. This paper explores both variable-length feedback codes with termination (VLFT) and the more practical variable length feedback (VLF) codes without termination that require no assumption of noiseless transmitter confirmation. For VLF, we consider both a two-phase scheme and CRC-based scheme.

Protograph-based Raptor-like LDPC codes for the binary erasure channel

This paper designs protograph-based Raptor-like (PBRL) codes as a class of rate-compatible (RC) LDPC codes for binary-erasure channels (BEC). Similar to the Raptor Codes, the RC property is achieved by X-OR operations of the precoded bits. The additional parity bits, which lower the rate, are selected such that their connections in the protograph optimize the density evolution threshold. In order to avoid problematic graphical objects in the CPEG lifted bipartite graph and guarantee the linear growth distance property some constraints are imposed in the threshold optimization algorithm. Simulation results are presented for information block sizes of k = 1032, and k = 16384. These results are compared with finite blocklength bounds of Polyanskiy, Poor, Verdu (PPV) as well as several asymptotic bounds. The k = 1032 code family operates at various rates in the range of 8/9 to 8/48 and has an average normalized threshold gap of 5.56% from capacity. The k = 16384 code family operates at rates 8/10 to 8/32 and has an average normalized threshold gap of 3.27% from capacity.

Feedback systems using non-binary LDPC codes with a limited number of transmissions

One advantage of incremental transmissions with feedback in point-to-point memoryless channels is a reduction in average blocklength required to approach capacity. This paper optimizes the size of each incremental transmission for non-binary (NB) LDPC codes to maximize throughput in VLFT and two-phase VLF settings. The optimization problem uses an approximation based on the inverse-Gaussian p.d.f. of the blocklength required for successful decoding. By using the optimized incremental transmission lengths (with an average blocklength of less than 500 bits), NB-LDPC codes for VLFT setting limited to 5 transmissions achieve a throughput greater than 96% of that obtained by an unlimited-transmission VLFT scheme with the same average blocklength. With a similar average blocklength, a two-phase VLF system limited to five transmissions (with optimized lengths) using the binary image of NB-LDPC codes achieves greater than 90% of the capacity of binary-input AWGN channel with SNR=2 dB. Two-phase VLF does not match the throughput of VLFT, but it is more practical than VLFT because it does not assume noiseless transmitter confirmation.

Sequential differential optimization of incremental redundancy transmission lengths: An example with tail-biting convolutional codes

This paper applies the sequential differential optimization (SDO) algorithm to optimize the transmission lengths of incremental redundancy for a 1024-state tail-biting convolutional code. The tail-biting reliability-output Viterbi algorithm is used to determine whether to inform the transmitter that a message has been successfully received or to request that the transmitter provide additional convolutional code bits. In order to maximize the average throughput, SDO is used to determine the rate of the initial codeword and the number of bits of incremental redundancy to be sent in each increment. With the help of SDO, this paper demonstrates a system that achieves 86.3 percent of the binary-input AWGN capacity (for SNR 2 dB) with an average blocklength of 115.5 symbols.

Some results on spatially coupled protograph LDPC codes

Spatially coupled low-density parity-check block codes (SC-LDPC-BCs) are a class of LDPC codes in which certain ensembles achieve capacity under iterative belief propagation decoding. Prior work has considered these codes mostly from a protograph perspective. Following this viewpoint, our work presents new protographs for the design of protograph-based SC-LDPC-BCs. A reciprocal channel approximation (RCA) analysis of the terminated protographs yields the asymptotic performance limits of the ensembles in terms of their iterative decoding thresholds. Our protographs possess the properties of linear minimum distance growth rate and excellent thresholds. We consider the following channels in our work: binary-input additive white Gaussian noise channel (BI-AWGNC), binary erasure channel (BEC), and binary symmetric channel (BSC). Our work focuses on obtaining good designs, with two classes of ensembles being asymptotically regular, for all the three channels while minimizing rate loss.

Universal rate-compatible LDPC code families for any increment ordering

Rate-compatible (RC) codes are at the core of systems with incremental redundancy. Usually, an RC code family supports successively lower code rates by sending specific increments of additional redundancy at each rate. That is, the order of the increments is fixed. However, in some multi-hop communication systems and also in recently proposed inter-frame coding, the order in which the decoder of the RC code receives the increments is not predetermined. A different ordering of the increments at the decoder may change the codes of various rates. This paper seeks RC codes that are universally good over all increment orderings. We call RC codes satisfying this requirement universal for any increment ordering (UIO) codes. We design protograph-based Raptor-like (PBRL) low-density parity-check (LDPC) code ensembles for UIO codes using protograph thresholds as components of two design metrics. One metric seeks codes that, at each code rate, have exactly the same frame error rate for all increment orderings. The other metric sacrifices strictly identical performance for every ordering to seek codes that achieve the best possible throughput in a variable-length setting with random increment ordering, as would occur with inter-frame coding. Simulation results of UIO-PBRL codes from the new ensembles show that our designs satisfy the two metrics.