Kathryn L. Smith

Performance of digital discrete-time implementations of non-Foster circuit elements

There is renewed interest in the use of non-Foster circuit elements in a variety of important applications such as wideband impedance matching and artificial magnetic conductors. Although non-Foster devices such as negative capacitors and negative inductors can be realized using current conveyors and Linvill circuits, a digital design approach may offer an important alternative in some applications. Therefore, digital discrete-time implementations of non-Foster circuit elements are investigated, and simulation results are presented for the implementation of a discrete-time negative inductor and a discrete-time negative capacitor.

Stability conditions for a digital discrete-time non-Foster circuit element

Digital discrete-time implementations of non-Foster circuit elements offer an alternative to conventional analog circuit approaches. In particular, the design of a discrete-time negative capacitor is investigated, since such non-Foster circuit elements offer significant potential in wideband antenna, metamaterial, and artificial magnetic conductor applications. As with analog non-Foster circuits, stability is an important design consideration for digital non-Foster elements. Therefore, stability conditions and simulation results are presented for a discrete-time negative capacitor, and the onset of instability is shown near the predicted stability boundary.

Measurement of a CMOS negative inductor for wideband non-foster metamaterials

There is increasing interest in impedance-matching methods that use non-Foster circuits to provide wideband operation in a variety of microwave devices such as antennas and metamaterials. In addition, many of these prior non-Foster circuits employ bipolar negative impedance converter designs, and it is advantageous to move such designs into CMOS. Therefore, the present work provides new measured results building upon an earlier proposed design of a negative inductor in a 0.5 micron CMOS process. The proposed circuit eliminates a resistor from a common negative impedance converter topology, and the prototype performs well at high frequency. Measured results show a low-frequency inductance of -95 nH falling to -85 nH at 750 MHz and -63 nH at 1 GHz. Finally, simulation results are presented for the performance of the circuit in a metamaterial application.

Measurement of a fast-wave line using digital non-Foster circuits for software-adjustable delay

Measured results are compared to simulation results for a wideband software-adjustable fast-wave line using coaxial line sections loaded with digital discrete-time non-Foster circuit elements. In the proposed approach, the negative capacitance of non-Foster circuit elements is varied by changing the signal processing in the digital non-Foster circuit. For the purposes of demonstration and comparison with analog non-Foster approaches, a prototype three-stage fast-wave coaxial line is implemented using three digital negative capacitors. Group delay is shown to be less than in corresponding vacuum propagation, and group delay is shown to be adjustable in software with varied negative capacitance. Measured and simulated results are in good agreement, and closely resemble a frequency-scaled version of prior fast-wave results for analog non-Foster loaded waveguide at higher frequency.

A cross-coupled cmos negative capacitor for wideband metamaterial applications

Non-Foster circuits can be used to provide broadband impedance matching for antennas and metamaterials. These circuits allow effective matching over a much wider bandwidth than is expected from traditional passive components. Therefore, this paper considers the design and test of a negative capacitor in a 0.5 micron CMOS process. The proposed circuit uses a cross-coupled design to allow for floating operation, and the designs simulated performance works well at high frequency. Measured results show a low-frequency capacitance of -1.7 pF and within 10% to 200 MHz, and falling to -4 pF at 230 MHz. Although the selected CMOS process is adequate to demonstrate the basic design approach, more advanced process nodes would be expected to extend performance to even higher frequencies. Results are also presented showing performance of the circuit in a metamaterial.

Measurement and simulation of a CMOS current conveyor negative capacitor for metamaterials

Current conveyors can be used as building blocks for implementing non-Foster circuits such as negative capacitors and negative inductors that are useful in extending bandwidth in metamaterials. In the present paper, measured results are presented for a prototype integrated circuit current conveyor negative capacitor. This circuit has been fabricated in a 0.5 micron CMOS process following previous results. Although CMOS is a desirable technology for circuit implementation, it is accompanied by design challenges of associated parasitic resistance. To investigate these issues, a prototype second generation current conveyor (CCII) is designed and tested in a negative capacitance circuit. In addition, full-wave electromagnetic simulation results are also presented showing the effects of observed resistance on overall metamaterial performance.

A digital non-Foster fast-wave line using an Internet of Things approach for software tuning of multiple digital negative capacitors

A software-tunable digital non-Foster fast-wave transmission line is presented, using an Internet of Things approach to implement tuning and signal monitoring. Such non-Foster fast-wave lines offer greater bandwidth than conventional passive designs, and a digital non-Foster approach is proposed to provide a software-adjustable implementation of the required negative capacitors. Further, an IoT (Internet-of-Things) approach is employed, where multiple non-Foster circuit elements are controlled over Ethernet by a laptop graphical user interface, including remote signal monitoring. This IoT approach has the advantage of being readily extended to accommodate more devices or multidimensional arrays. Measured data is presented for an IoT-based prototype of a superluminal digital non-Foster fast-wave line with software-tunable negative capacitance.

A multiband ringed rectangular patch antenna

This paper presents a multiband, electrically small patch antenna with dimensions 147.9 mm by 90.4 mm and an inset microstrip feed. The length of this antenna is suited to a 0.5 GHz resonance. The geometry of the patch has been modified from its traditional form by introduction of five 0.6 mm gaps just inside its outer edge. The effect of these gaps is to reduce the highest frequency of resonance from 500 MHz to 446 MHz, and to introduce three additional resonances, at 353 MHz, 389.5 MHz, and 412.5 MHz.

A λ ∘ /60 spherical spiral metamaterial for negative permeability and negative permittivity

A novel spherical spiral metamaterial unit cell is presented. The structure is shown to provide negative permeability over a 31.7% bandwidth at one orientation with respect to the incident electric field, negative permittivity over a 40.4% bandwidth at a second orientation, and double-negative behavior over a 15.5% bandwidth at a third orientation. At all performance frequencies, the structure is smaller than λo/60.

Measurement, simulation, and theory of a non-Foster unit cell with parasitic resistance

Measured, simulated, and theoretical results are presented for a unit cell loaded by a non-Foster circuit element comprising a negative capacitor. The unit cell is suspended in the electromagnetic field of a coaxial line for characterization, rather than being directly wired to the transmission line. Relative dielectric constant less than unity was observed over a 5:1 bandwidth, and supporting theory is presented showing that bandwidth can be improved by reducing parasitic resistance of the non-Foster element. Theoretical, simulated, and measured results show similar bandwidth and permittivity characteristics.