Katsunori Mitsuhashi

Novel Oxygen Free Titanium Silicidation (OFS) Processing for Low Resistance and Thermally Stable SALICIDE (Self-Aligned Silicide) in Deep Submicron Dual Gate CMOS (Complementary Metal-Oxide Semiconductors)

A low resistance and thermally stable TiSi 2 self aligned silicide (SALICIDE) for deep submicron p + and n + dual gate complementary metal-oxide semiconductors (CMOS) has been developed. This was achieved through the use of a novel oxygen free silicidation (OFS) process using a reaction between a titanium included nitrogen (Ti x N y ) and an oxygen free poly-Si-gate. The oxygen free poly-Si was realized using low pressure chemical vapor deposition (LPCVD) system with nitrogen flow Load-Lock chamber. The OFS TiSi 2 film did not agglomerate after the treatment of the RTA at 1050°C for 20 s in a N 2 atmosphere and the additional furnace annealing at 900°C for 30 min. in a N 2 atmosphere. For both n + and p + gates, low sheet resistances (about 2.8 Ω/square.) were achieved under the 0.2 μm size

Elevated Polycide Source/Drain Shallow Junctions with Advanced Silicidation Processing and Al Plug/Collimated PVD (Physical Vapor Deposition)-Ti/TiN/Ti/Polycide Contact for Deep-Submicron Complementary Metal-Oxide Semiconductors

Low-resistivity shallow junctions and completely filled contact technologies have been developed. These were realized by forming the elevated polycide source/drain junction structure and Al plug/collimated PVD-Ti/TiN/Ti/Ti-polycide (APPOCIDE) contact structure through the use of advanced silicidation processes called AAS and BAS (arsenic ions doped into the polycide layer after silicidation and boron ions doped into the polycide layer after silicidation). About 2.0–2.1 Ω /square sheet resistances of n+-Ti-polycide and p+-Ti-polycide were reached at the same level as that of undoped Ti-polycide. Contact resistivities were 2–3×10-9 Ω cm2 for a 0.35-µm-diameter contact on both n+ and p+. These contact resistivities were two orders of magnitude lower than that of the conventional Al/TiN/Ti/n+ or p+-silicon structure. Furthermore, we proposed a unique consideration for the reasons for the relative difficulty in achieving silicidation with low sheet resistance of TiSi2 layer on n+- polysilicon as compared to that on undoped- polysilicon.

Interconnection Technology for Three-Dimensional Integration

The technology of thermally stable and fully planarized multilevel interconnections with selective CVD-W vias and 31P+/11B+ implanted WSix/TiN/Si contacts has been developed for three-dimensional VLSIs. Via holes with high aspect ratios (about 3) and different depths (0.8–3.0 µm) were completely filled by selective W-CVD and subsequent etch-back, and the surface was planarized to below 0.2 µm using a previously reported interlevel insulation planarization technology. Metal-silicon reactions during high-temperature annealing were eliminated by the use of a TiN thin film (0.08 µm) containing oxygen as a diffusion barrier. By performing an additional 31P+ and 11B+ implantation into the interconnection, the ohmic contacts to n+ and p+ Si in this structure were also maintained even after annealing at 900°C for 6 hours.

Selective CVD tungsten contact plug technology with plasma pre-treatment

Low-resistance contact plug technology using selective CVD of W by the SiH/sub 4/ reduction of WF/sub 6/ with SF/sub 6/ pretreatment was developed. This technology solved problems such as encroachment, wormholes, Si consumption, and poor adhesion encountered in only the H/sub 2/-reduction system or only the SiH/sub 4/-reduction system without pretreatment. The contact resistance in this system is lower than that in conventional metallization with Al-Si/Si contacts. It is predicted that this technology will become important for improving the reliability of the interconnection for submicron VLSI.<<ETX>>

Diffusion Barrier with Reactively Sputtered TiN for Thermally Stable Contact

The barrier capability of reactively sputtered TiN thin films was investigated in W/TiN/Si structures. During high-temperature annealing, a thin layer was formed at the interface between TiN and Si. This phenomenon is due to the oxygen combining with Ti in the TiN film and slight diffusion of Ti and Si atoms. The film properties of this TiN, especially film resistivity, were greatly affected by the oxygen impurities which combined with the Ti. This seems to be one of the reasons why a high-temperature annealing barrier capability was obtained. The ohmic contacts to n+ and p+ Si in this structure were maintained even after annealing at 900°C for 6 hours by performing an additional 31P+ and 11B+ implantation into W.