Katsushi Tara
Panasonic
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Publication
Featured researches published by Katsushi Tara.
radio frequency integrated circuits symposium | 1999
Masahiko Inamori; Kaname Motoyoshi; Takahiro Kitazawa; Katsushi Tara; Masahiro Hagio
A 40 dB-dynamic-range variable gain amplifier designed for CDMA cellular phones has been developed. A wide dynamic range variable gain amplifier under low control voltage of 2.0 V compatible with high linearity and low distortion characteristics essential for CDMA is realized by the new gain control technique. It greatly contributes to the high performance and small size RF circuits of CDMA cellular handsets.
radio frequency integrated circuits symposium | 2001
Shinji Yamamoto; Atsushi Suwa; Toshiharu Tanbo; Takahiro Kitazawa; Katsushi Tara; Masahiro Hagio
An RF Transmitter Receiver MMIC (TX-RX MMIC) with 16-pin plastic package has been developed for 5.8 GHz Japanese Electronic Toll Collection system (ETC). The MMIC contains following RF blocks; local buffer amplifier, variable attenuator, ASK modulator, power amplifier, low-noise amplifier, down-converter, local switch and antenna switch. We have developed the new Surface Via-Hole (SVH) isolation technique to integrate all RF circuits into single chip. The double hetero-junction modulation doped FETs (MODFETs) and SrTiO/sub 3/ (STO) MIM capacitors are also developed to realize a single voltage operation and small chip size. By using SVH isolation technique, low carrier leakage of -43 dBm, high on/off ratio of 39.6 dB at 5.84 GHz and low total current of 150 mA are achieved, and the practical small chip size (2.25/spl times/1.25 mm/sup 2/) is realized.
radio frequency integrated circuits symposium | 2005
E. Yasuda; K. Hidaka; Tadayoshi Nakatsuka; A. Watanabe; Katsushi Tara
We propose an ultra-low distortion 3P2T antenna switch MMIC for dual-band W-CDMA systems. The switch MMIC consists of a GaAs MMIC with 0.4 /spl mu/m-gate p-HEMT and Si CMOS IC with a decoder and charge pump circuit. Ultra-low distortion and low insertion loss were achieved by controlling 2-stacked FETs with a voltage of 7 V up-converted from a supply voltage of 2.4 V. The switch MMIC provides IMD2 and IMD3 levels less than -110 dBm, which well satisfies the out-of-band blocking specification for W-CDMA systems. The MMIC shows insertion loss of 0.27 dB for 800 MHz and 0.38 dB for 2 GHz bands.
radio frequency integrated circuits symposium | 2000
M. Nakayama; Kaname Motoyoshi; Takahiro Kitazawa; Katsushi Tara; Masahiro Hagio
This paper presents a two step power control driver MMIC for wideband-CDMA handsets. It has the self current control function coupled with the output power level. It realizes low current consumption of 12 mA at an average output power level (Pave) without any sacrifice of high performance at the high output power level. It greatly contributes to the realization of compact and low power consumption W-CDMA handsets.
Archive | 2007
Tadayoshi Nakatsuka; Katsushi Tara; Shinji Fukumoto
Archive | 2002
Fumihiko Kawai; Toshiyuki Fukuda; Masanori Minamio; Noboru Takeuchi; Shuichi Ogata; Katsushi Tara; Tadayoshi Nakatsuka
Archive | 2004
Tadayoshi Nakatsuka; Atsushi Suwa; Katsushi Tara
Archive | 2002
Atsushi Suwa; Tadayoshi Nakatsuka; Tadashi Komatsu; Katsushi Tara
Archive | 2002
Kenichi Hidaka; Tadayoshi Nakatsuka; Katsushi Tara
Archive | 2006
Tadayoshi Nakatsuka; Katsushi Tara; Shinji Fukumoto