Tadayoshi Nakatsuka
Panasonic
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Featured researches published by Tadayoshi Nakatsuka.
international reliability physics symposium | 1992
Atsushi Watanabe; Kazuhisa Fujimoto; Mayumi Oda; Tadayoshi Nakatsuka; Akiyoshi Tamura
Rapid degradation of GaAs self-aligned gate MESFETs (SAGFETs) by hot carriers was observed. The degradation rate was found to depend on the type of passivation film on the GaAs surface. SAGFETs with SiN passivation were found to have higher resistance to degradation than SAGFETs with SiO/sub 2/ passivation. The results suggest that the interface between the GaAs surface and the passivation film must be considered in any model for the degradation mechanism.<<ETX>>
radio frequency integrated circuits symposium | 1998
Junji Itoh; Tadayoshi Nakatsuka; Kimihiko Sato; Yasumi Imagawa; Tomoya Uda; Takahiro Yokoyama; Masahiro Maeda; O. Ishikawa
A low distortion GaAs quadrature modulator IC with on-chip active 90/spl deg/ phase-shifter was fabricated by using high linearity GaAs MESFET technology for wideband wireless applications. The IC showed OIP3 of +16 dBm, CLR of -40 dBc, and IRR of -40 dBc at supply voltage of 5.0 V, dissipation current of 70 mA and carrier frequency of 600 MHz. Excellent EVM smaller than 1.0% and ACPR of 60 dBc were also obtained for 4 Mbps QPSK signal with Pout of -10 dBm.
IEEE Control Systems Magazine | 1996
Junji Itoh; Tadayoshi Nakatsuka; Mitscuu Nishitsuji; Tomoya Uda; O. Ishikawa
A 1.0 V operation GaAs receiver front-end IC has been developed by using novel combination of an E-FET and a D-FET for the amplifiers and mixer, high performance GaAs BP-MESFET and on-chip high-/spl epsiv//sub r/, capacitors. The IC shows conversion gain (CG) of 23 dB noise figure (NF) of 2.8 dB, the 3rd order output intercept point (IP3out) of 3 dBm, image rejection ratio (IRR) over 20 dB and LO to RF isolation over 25 dB, operating at 880 MHz and 6.8 mA. At 1.9 GHz, the IC also has excellent RF characteristics at dissipation current of 6.5 mA. The IC chip has the small size of 0.75 mm/spl times/0.75 mm, and is molded in a mini-6pin package.
IEEE Control Systems Magazine | 1995
Tadayoshi Nakatsuka; Junji Itoh; Shinji Yamamoto; Takayuki Yoshida; Mitsuru Nishitsuji; Tomoya Uda; Katsunori Nishii; O. Ishikawa
A highly miniaturized and low power consumption receiver front-end hybrid IC(HIC) including input matching circuits for 880 MHz bands using on-chip high-dielectric constant (/spl epsi//sub r/) capacitors has been newly developed. The HIC is composed of a GaAs IC chip and a ceramic substrate with spiral inductors on its surface. The HIC showed conversion gain of 20.2 dB and noise figure of 4.2 dB at supply voltage of 2.7 V and dissipation current of 3.7 mA. The HIC measures only 5.0 mm/spl times/5.0 mm/spl times/1.0 mm.<<ETX>>
The Japan Society of Applied Physics | 1993
Hiroyuki Masato; Tadayoshi Nakatsuka; Toshinobu Matsuno; Kaoru Inoue
We have successfully fabricated AlGaAVGaAVlnGaAs Double-Doped Quantum-Well (DDOVV) HEMTs with flat-gm charrcteristics in the wide gate vdtage range from -1.0V to 0.3V. The feedback amplifier using this HEMT showed excellent low distortion properties of lP. and lP. of 59.4dBm and 40.0dBm, respectively, at 1GHz, and good noise figure of less than 2.0d8 throughout a wide frequency range of 100MHz to 1 .6GHz. These features will make the DDQW HEMTs quite suitable for low-distortion and low-noise amplif ier applications.
radio frequency integrated circuits symposium | 2005
E. Yasuda; K. Hidaka; Tadayoshi Nakatsuka; A. Watanabe; Katsushi Tara
We propose an ultra-low distortion 3P2T antenna switch MMIC for dual-band W-CDMA systems. The switch MMIC consists of a GaAs MMIC with 0.4 /spl mu/m-gate p-HEMT and Si CMOS IC with a decoder and charge pump circuit. Ultra-low distortion and low insertion loss were achieved by controlling 2-stacked FETs with a voltage of 7 V up-converted from a supply voltage of 2.4 V. The switch MMIC provides IMD2 and IMD3 levels less than -110 dBm, which well satisfies the out-of-band blocking specification for W-CDMA systems. The MMIC shows insertion loss of 0.27 dB for 800 MHz and 0.38 dB for 2 GHz bands.
IEEE Journal of Solid-state Circuits | 1998
Tadayoshi Nakatsuka; Junji Itoh; Takayuki Yoshida; Mitsuru Nishitsuji; Tomoya Uda; O. Ishikawa
A miniaturized receiver front-end hybrid IC (HIC) using MBB (microbump bonding) technology has been demonstrated. A GaAs IC die was dip-chip bonded on a ceramic substrate with matching circuits on its surface. New technologies such as 0.5 /spl mu/m gate buried p-layer MESFETs, on-chip high-dielectric constant capacitors, and intermediate tuned circuits have enabled miniaturization and low power-consumption at the same time. The fabricated HIC measured only 3.5/spl times/4.0/spl times/1.0 mm which corresponded to a 64% reduction from the conventional one. Conversion gain of 16.0 dB, IP3 out of 0 dBm, noise figure of 5.1 dB, and image rejection ratio over 20 dBc were obtained for the new HIC at 1.9 GHz, 3.0 V, and 4.5 mA of power supply.
Archive | 2007
Tadayoshi Nakatsuka; Katsushi Tara; Shinji Fukumoto
Archive | 2002
Fumihiko Kawai; Toshiyuki Fukuda; Masanori Minamio; Noboru Takeuchi; Shuichi Ogata; Katsushi Tara; Tadayoshi Nakatsuka
Archive | 2004
Tadayoshi Nakatsuka; Atsushi Suwa; Katsushi Tara