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Dive into the research topics where Katsushige Matsubara is active.

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Featured researches published by Katsushige Matsubara.


international solid-state circuits conference | 2016

4.4 A 197mW 70ms-latency full-HD 12-channel video-processing SoC for car information systems

Seiji Mochizuki; Katsushige Matsubara; Keisuke Matsumoto; Chi Lan Phuong Nguyen; Tetsuya Shibayama; Kenichi Iwata; Katsuya Mizumoto; Takahiro Irita; Hirotaka Hara; Toshihiro Hattori

Todays car information systems (CIS) are growing into integrated cockpit systems, supporting not solely infotainment, such as navigation and AV playing/recording, but also driver assistance, such as surround view systems. Also, in-car video transfer via Ethernet is becoming widespread. Such networks connect camera modules, head unit controllers and rear-seat display units, and carry video signals encoded in H.264 according to EthernetAVB. Thus, it is necessary for integrated cockpit systems to handle significant amounts of video processing. A key requirement for such systems is also low power consumption and thermal management for stable operation.


international conference on ic design and technology | 2016

71% Reducing the memory bandwidth requirement for a multi-standard video codec by lossless compression of video using a combination of 2D-DPCM and Variable Length Coding

Chi Lan Phuong Nguyen; My Phi Ngoc Nguyen; Hung Van Cao; Katsushige Matsubara; Keisuke Matsumoto; Seiji Mochizuki; Kenichi Iwata

Memory bandwidth is a critical issue tor a high performance and high resolution video codec. We propose a lossless compression solution to reduce memory bandwidth requirement for a multi-standard video codec. The solution is a combination of 2D-DPCM, Variable Length Coding and 4-way set-associative cache. Experimental results show that the proposed solution can reduce the memory bandwidth requirement with 71% for reference data.


Archive | 2016

Image receiving device, image transmission system and image receiving method

Kenichi Iwata; Tetsuya Shibayama; Katsushige Matsubara; Ren Imaoka; Seiji Mochizuki


Archive | 2017

SEMICONDUCTOR DEVICE AND CONTROL METHOD OF SEMICONDUCTOR DEVICE

Masaru Hase; Tetsuji Tsuda; Naohiro Nishikawa; Yuki Inoue; Seiji Mochizuki; Katsushige Matsubara; Ren Imaoka


Archive | 2017

Image processing apparatus and control method for the same including estimation and scheduling

Katsushige Matsubara; Takayuki Matsumi; Seiji Mochizuki; Kenichi Iwata; Toshiyuki Kaya


Archive | 2017

SEMICONDUCTOR DEVICE, DATA PROCESSING SYSTEM, AND SEMICONDUCTOR DEVICE CONTROL METHOD

Katsushige Matsubara; Keisuke Matsumoto; Seiji Mochizuki


2017 7th International Conference on Integrated Circuits, Design, and Verification (ICDV) | 2017

16.8 GB/s LPDDR4-3200@32-bit memory access bandwidth

Kha Minh Huynh; Thien Thanh Bui Nguyen; Hai Vu Nguyen; Khoa Dac Tran; Kenichi Iwata; Katsuya Mizumoto; Nobuhiko Honda; Keisuke Matsumoto; Katsushige Matsubara; Seiji Mochizuki


Archive | 2016

Image Processing Device and Semiconductor Device

Keisuke Matsumoto; Katsushige Matsubara; Seiji Mochizuki; Toshiyuki Kaya; Hiroshi Ueda


Archive | 2016

Image communication apparatus, image transmission apparatus, and image reception apparatus

Tetsuya Shibayama; Seiji Mochizuki; Katsushige Matsubara; Kenichi Iwata


Archive | 2016

PROCESSING APPARATUS AND CONTROL METHOD THEREOF

Hiroshi Ueda; Seiji Mochizuki; Toshiyuki Kaya; Kenichi Iwata; Katsushige Matsubara

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