Tetsuya Shibayama

A 64 mW High Picture Quality H.264/MPEG-4 Video Codec IP for HD Mobile Applications in 90 nm CMOS

We have developed an H.264/MPEG-4 dual video codec IP for mobile applications such as digital still cameras (DSCs), digital video cameras (DVCs), and mobile phones. The codec is capable of encoding and decoding HD-sized moving pictures (1280 pixels by 720 lines at 30 fps) in real-time at an operating frequency of 144 MHz, and SD-sized pictures at 54 MHz. We have implemented our original architecture based on a macroblock-level pipeline method and encoding algorithms suitable for the architecture in the codec, which enable low power of 64 mW for HD encoding with high picture quality equivalent to that of the H.264 reference encoder ldquoJM (Joint Model)rdquo.

A 256mW full-HD H.264 high-profile CODEC featuring dual macroblock-pipeline architecture in 65nm CMOS

A video-size-scalable H.264 high-profile CODEC including 19 specific CPUs for extensibility to multiple standards has been fabricated in 65 nm CMOS. With two parallel pipelines for macroblock processing, the CODEC consumed 256 mW in real-time encoding of full-HD (1080i) video at an operating frequency of 162 MHz. It represents a 38% reduction in power consumption per pixel compared with state-of-the-art designs.

A low power and high picture quality H.264/MPEG-4 video codec IP for HD mobile applications

We have developed an H.264/MPEG-4 video codec IP for mobile applications such as digital still cameras (DSCs) and digital video cameras (DVCs) The codec is capable of encoding/decoding HD sized moving pictures (1280 pixels by 720 lines at 30 fps) in real-time at an operating frequency of 144 MHz, and SD sized at 54 MHz. The original algorithms employed in the codec realize low power of 64 mW for encoding HD with high picture quality equivalent to JM reference encoder.

4.4 A 197mW 70ms-latency full-HD 12-channel video-processing SoC for car information systems

Todays car information systems (CIS) are growing into integrated cockpit systems, supporting not solely infotainment, such as navigation and AV playing/recording, but also driver assistance, such as surround view systems. Also, in-car video transfer via Ethernet is becoming widespread. Such networks connect camera modules, head unit controllers and rear-seat display units, and carry video signals encoded in H.264 according to EthernetAVB. Thus, it is necessary for integrated cockpit systems to handle significant amounts of video processing. A key requirement for such systems is also low power consumption and thermal management for stable operation.

An 80 mW dual video-codec SoC for seamless playback of digital terrestrial television and mobile broadcasting services

A mobile digital-terrestrial-television SoC with two multi-standard video codec is integrated on a 5.3×5.4 mm2 die in 45 nm CMOS. The dual video codec with dynamic frequency selection and advanced tile-based address translation consumes 80 mW in real-time playback of full-HD MPEG-2 and SD H.264 streams from 64 bits width low-power DDR-SDRAM at 1.1V.

Low-complexity intra-prediction for H.264/AVC using pseudo local decoded image

This paper presents a method of low-complexity intra-prediction for H.264/AVC that uses pseudo local decoded image (PLDI). The PLDI is created using a Hadamard transform and used for intra-prediction mode decision. Our experimental results show that the proposed method can reduce the complexity of the intra-prediction process with acceptable losses in picture quality.