Kazunari Horikawa

Transition-based coverage estimation for symbolic model checking

Lack of complete formal specification is one of the major obstacles for the deployment of model checking. Coverage estimation addresses this issue by revealing the unverified part of the design according to the specified properties. In this paper, we propose a new transition-based coverage metric to evaluate the completeness of properties for symbolic model checking. It is more comprehensive and accurate than the existing coverage metrics for model checking. An efficient symbolic algorithm is presented for computing the transition coverage for a subset of ACTL. Our coverage estimator has been applied to the model checking of a cache coherence protocol. We uncovered several coverage holes including one that eventually led to the discovery of a design bug.

Extended abstract: transition traversal coverage estimation for symbolic model checking

Model checking can exhaustively verify whether a system (implementation) satisfies a set of properties (formal specification). However, the completeness of the formal specification itself is not clear and needs to be evaluated. Several coverage estimation methods have been proposed for this issue. In this paper, we present a transition traversal coverage method for a subset of CTL. With this method, we can detect the transitions, which are not verified by any property. It is more accurate and comprehensive than the state coverage method.

Transition traversal coverage estimation for symbolic model checking

Model checking can exhaustively verify a set of specified properties on a given implementation. However, it is very hard to determine whether sufficient properties have been specified or not. In this paper, we propose a transition traversal coverage method for a subset of CTL to evaluate the completeness of properties. With this method, we can detect the transitions which are not verified by any property. It is more comprehensive and accurate than state-based coverage metric. We avoid generating the perturbed implementation by directly traversing transitions based on the semantics of CTL formulas. Experimental results show that the proposed method can discover subtle coverage holes with low computation cost.

Coverage Estimation Using Transition Perturbation for Symbolic Model Checking in Hardware Verification*The preliminary version of this paper was presented at Asian South Pacific Design Automation Conference (ASPDAC), January, 2006 [17].

Lack of complete formal specification is one of the major obstacles to the deployment of model checking. Coverage estimation addresses this issue by revealing the unverified part of the design according to the specified properties. In this paper we propose a new transition-based coverage metric to evaluate the completeness of properties for symbolic model checking. Our coverage metric pinpoints the transitions through which the values of signals are checked. An efficient symbolic algorithm is presented for computing the transition coverage for a subset of ACTL. Our coverage estimator has been applied to the model checking of a cache coherence protocol. We uncovered several coverage holes including one that eventually led to the discovery of a design bug.

ASIC library qualification: criteria and procedure

Library accuracy is a vital concern for library builders and library users. As complexity of ASICs increases, more accurate logic simulation is required to get a functional silicon chip. Usually ASIC vendors provide many libraries on third party simulators, as well as Golden Simulator. Assuming a master library for the Golden Simulator is well correlated with silicon performance, libraries on other third vendor simulators have to be qualified with the master library as a reference. This paper focuses on qualities of third party simulator libraries derived from the master library. Quality requirements and a quality measure, as well as a qualification procedure are discussed.<<ETX>>