Kazuo Nakaizumi

Memory failure analysis using EB voltage contrast image

This paper presents some novel fault localization techniques for a memory LSI by using an EB tester. Effective techniques for applying pulse combinations of input signals and acquiring images are put forward. Excellent voltage contrast images are acquired on the passivated devices without degradation of voltage contrast from charge up. Signal lines are back-traced by comparing good and bad images to identify the failure point. Application to the failure analysis of DRAMs is successfully performed with minimal time requirements.