Kechao Tang

Arsenic decapping and pre-atomic layer deposition trimethylaluminum passivation of Al2O3/InGaAs(100) interfaces

The interrelated effects of initial surface preparation and precursor predosing on defect passivation of atomic layer deposited (ALD) Al2O3/InGaAs(100) interfaces are investigated. Interface trap distributions are characterized by capacitance-voltage and conductance-voltage analysis of metal-oxide-semiconductor capacitors. Thermal desorption conditions for a protective As2 layer on the InGaAs surface and dosing conditions of trimethylaluminum prior to ALD-Al2O3 are varied to alter the interface trap densities. Experimental results are consistent with the predictions of ab initio electronic structure calculations showing that trimethylaluminum dosing of the As-rich In0.53Ga0.47As(100) surface suppresses interface traps by passivating As dangling bonds prior to the initiation of Al2O3 deposition.

From Twinning to Pure Zincblende Catalyst-Free InAs(Sb) Nanowires

III-V nanowires are candidate building blocks for next generation electronic and optoelectronic platforms. Low bandgap semiconductors such as InAs and InSb are interesting because of their high electron mobility. Fine control of the structure, morphology, and composition are key to the control of their physical properties. In this work, we present how to grow catalyst-free InAs1-xSbx nanowires, which are stacking fault and twin defect-free over several hundreds of nanometers. We evaluate the impact of their crystal phase purity by probing their electrical properties in a transistor-like configuration and by measuring the phonon-plasmon interaction by Raman spectroscopy. We also highlight the importance of high-quality dielectric coating for the reduction of hysteresis in the electrical characteristics of the nanowire transistors. High channel carrier mobilities and reduced hysteresis open the path for high-frequency devices fabricated using InAs1-xSbx nanowires.

Conductance and capacitance of bilayer protective oxides for silicon water splitting anodes

State-of-the-art silicon water splitting photoelectrochemical cells employ oxide protection layers that exhibit electrical conductance in between that of dielectric insulators and electronic conductors, optimizing both built-in field and conductivity. The SiO2-like layer interposed between a deposited protective oxide film and its Si substrate plays a key role as a tunnel oxide that can dominate the total device impedance. In this report, we investigate the effects of changes in interfacial SiO2 resistance and capacitance in the oxide bilayer through both solid state leakage current and capacitance–voltage measurements and through electrochemical methods applied to water splitting cells. Modelling is performed to describe both types of data in a simple and intuitive way, allowing for insights to be developed into the connections among both the dielectric (charge storage) and conductive (charge transport) properties of bilayer protective oxides and their effects on oxygen evolution performance. Finally, atomic layer deposited (ALD) Al2O3 is studied as an insulator layer with conductivity intermediate between that of tunnel oxide SiO2 and the more conductive ALD-TiO2, to further generalize this understanding.

Selective Passivation of GeO2/Ge Interface Defects in Atomic Layer Deposited High-k MOS Structures

Effective passivation of interface defects in high-k metal oxide/Ge gate stacks is a longstanding goal of research on germanium metal-oxide-semiconductor devices. In this paper, we use photoelectron spectroscopy to probe the formation of a GeO2 interface layer between an atomic layer deposited Al2O3 gate dielectric and a Ge(100) substrate during forming gas anneal (FGA). Capacitance- and conductance-voltage data were used to extract the interface trap density energy distribution. These results show selective passivation of interface traps with energies in the top half of the Ge band gap under annealing conditions that produce GeO2 interface layer growth. First-principles modeling of Ge/GeO2 and Ge/GeO/GeO2 structures and calculations of the resulting partial density of states (PDOS) are in good agreement with the experiment results.

Border trap reduction in Al2O3/InGaAs gate stacks

The effect of Al2O3 atomic layer deposition (ALD) temperature on the border trap density (Nbt) of Al2O3/InGaAs gate stacks is investigated quantitatively, and we demonstrate that lowering the trimethylaluminum (TMA)/water vapor ALD temperature from 270 °C to 120 °C significantly reduces Nbt. The reduction of Nbt coincides with increased hydrogen incorporation in low temperature ALD-grown Al2O3 films during post-gate metal forming gas annealing. It is also found that large-dose (∼6000 L) exposure of the In0.53Ga0.47As (100) surface to TMA immediately after thermal desorption of a protective As2 capping layer is an important step to guarantee the uniformity and reproducibility of high quality Al2O3/InGaAs samples made at low ALD temperatures.

Titanium Oxide Crystallization and Interface Defect Passivation for High Performance Insulator-Protected Schottky Junction MIS Photoanodes

Atomic layer deposited (ALD) TiO2 protection layers may allow for the development of both highly efficient and stable photoanodes for solar fuel synthesis; however, the very different conductivities and photovoltages reported for TiO2-protected silicon anodes prepared using similar ALD conditions indicate that mechanisms that set these key properties are, as yet, poorly understood. In this report, we study hydrogen-containing annealing treatments and find that postcatalyst-deposition anneals at intermediate temperatures reproducibly yield decreased oxide/silicon interface trap densities and high photovoltage. A previously reported insulator thickness-dependent photovoltage loss in metal-insulator-semiconductor Schottky junction photoanodes is suppressed. This occurs simultaneously with TiO2 crystallization and an increase in its dielectric constant. At small insulator thickness, a record for a Schottky junction photoanode of 623 mV photovoltage is achieved, yielding a photocurrent turn-on at 0.92 V vs NHE or -0.303 V with respect to the thermodynamic potential for water oxidation.

Distinguishing Oxygen Vacancy Electromigration and Conductive Filament Formation in TiO2 Resistance Switching Using Liquid Electrolyte Contacts

Resistance switching in TiO2 and many other transition metal oxide resistive random access memory materials is believed to involve the assembly and breaking of interacting oxygen vacancy filaments via the combined effects of field-driven ion migration and local electronic conduction leading to Joule heating. These complex processes are very difficult to study directly in part because the filaments form between metallic electrode layers that block their observation by most characterization techniques. By replacing the top electrode layer in a metal-insulator-metal memory structure with easily removable liquid electrolytes, either an ionic liquid (IL) with high resistance contact or a conductive aqueous electrolyte, we probe field-driven oxygen vacancy redistribution in TiO2 thin films under conditions that either suppress or promote Joule heating. Oxygen isotope exchange experiments indicate that exchange of oxygen ions between TiO2 and the IL is facile at room temperature. Oxygen loss significantly increases the conductivity of the TiO2 films; however, filament formation is not observed after IL gating alone. Replacing the IL with a more conductive aqueous electrolyte contact and biasing does produce electroformed conductive filaments, consistent with a requirement for Joule heating to enhance the vacancy concentration and mobility at specific locations in the film.

Nitride passivation of the interface between high-k dielectrics and SiGe

In-situ direct ammonia (NH3) plasma nitridation has been used to passivate the Al2O3/SiGe interfaces with Si nitride and oxynitride. X-ray photoelectron spectroscopy of the buried Al2O3/SiGe interface shows that NH3 plasma pre-treatment should be performed at high temperatures (300 °C) to fully prevent Ge nitride and oxynitride formation at the interface and Ge out-diffusion into the oxide. C-V and I-V spectroscopy results show a lower density of interface traps and smaller gate leakage for samples with plasma nitridation at 300 °C.

Interface Engineering for Atomic Layer Deposited Alumina Gate Dielectric on SiGe Substrates

Optimization of the interface between high-k dielectrics and SiGe substrates is a challenging topic due to the complexity arising from the coexistence of Si and Ge interfacial oxides. Defective high-k/SiGe interfaces limit future applications of SiGe as a channel material for electronic devices. In this paper, we identify the surface layer structure of as-received SiGe and Al2O3/SiGe structures based on soft and hard X-ray photoelectron spectroscopy. As-received SiGe substrates have native SiOx/GeOx surface layers, where the GeOx-rich layer is beneath a SiOx-rich surface. Silicon oxide regrows on the SiGe surface during Al2O3 atomic layer deposition, and both SiOx and GeOx regrow during forming gas anneal in the presence of a Pt gate metal. The resulting mixed SiOx-GeOx interface layer causes large interface trap densities (Dit) due to distorted Ge-O bonds across the interface. In contrast, we observe that oxygen-scavenging Al top gates decompose the underlying SiOx/GeOx, in a selective fashion, leaving an ultrathin SiOx interfacial layer that exhibits dramatically reduced Dit.

Effects of Titanium Layer Oxygen Scavenging on the High-k/InGaAs Interface

One of the main challenges in the path to incorporating InGaAs based metal-oxide-semiconductor structures in nanoelectronics is the passivation of high-k/InGaAs interfaces. Here, the oxygen scavenging effect of thin Ti layers on high-k/InGaAs gate stacks was studied. Electrical measurements and synchrotron X-ray photoelectron spectroscopy measurements, with in situ metal deposition, were used. Oxygen removal from the InGaAs native oxide surface layer remotely through interposed Al2O3 and HfO2 layers observed. Synchrotron X-ray photoelectron spectroscopy has revealed a decrease in the intensity of InOx features relative to In in InGaAs after Ti deposition. The signal ratio decreases further after annealing. In addition, Ti 2p spectra clearly show oxidation of the thin Ti layer in the ultrahigh vacuum XPS environment. Using capacitance-voltage and conductance-voltage measurements, Pt/Ti/Al2O3/InGaAs and Pt/Al2O3/InGaAs capacitors were characterized both before and after annealing. It was found that the remote oxygen scavenging from the oxide/semiconductor interface using a thin Ti layer can influence the density of interface traps in the high-k/InGaAs interface.