Andrew C. Meng

Titanium Oxide Crystallization and Interface Defect Passivation for High Performance Insulator-Protected Schottky Junction MIS Photoanodes

Atomic layer deposited (ALD) TiO2 protection layers may allow for the development of both highly efficient and stable photoanodes for solar fuel synthesis; however, the very different conductivities and photovoltages reported for TiO2-protected silicon anodes prepared using similar ALD conditions indicate that mechanisms that set these key properties are, as yet, poorly understood. In this report, we study hydrogen-containing annealing treatments and find that postcatalyst-deposition anneals at intermediate temperatures reproducibly yield decreased oxide/silicon interface trap densities and high photovoltage. A previously reported insulator thickness-dependent photovoltage loss in metal-insulator-semiconductor Schottky junction photoanodes is suppressed. This occurs simultaneously with TiO2 crystallization and an increase in its dielectric constant. At small insulator thickness, a record for a Schottky junction photoanode of 623 mV photovoltage is achieved, yielding a photocurrent turn-on at 0.92 V vs NHE or -0.303 V with respect to the thermodynamic potential for water oxidation.

Distinguishing Oxygen Vacancy Electromigration and Conductive Filament Formation in TiO2 Resistance Switching Using Liquid Electrolyte Contacts

Resistance switching in TiO2 and many other transition metal oxide resistive random access memory materials is believed to involve the assembly and breaking of interacting oxygen vacancy filaments via the combined effects of field-driven ion migration and local electronic conduction leading to Joule heating. These complex processes are very difficult to study directly in part because the filaments form between metallic electrode layers that block their observation by most characterization techniques. By replacing the top electrode layer in a metal-insulator-metal memory structure with easily removable liquid electrolytes, either an ionic liquid (IL) with high resistance contact or a conductive aqueous electrolyte, we probe field-driven oxygen vacancy redistribution in TiO2 thin films under conditions that either suppress or promote Joule heating. Oxygen isotope exchange experiments indicate that exchange of oxygen ions between TiO2 and the IL is facile at room temperature. Oxygen loss significantly increases the conductivity of the TiO2 films; however, filament formation is not observed after IL gating alone. Replacing the IL with a more conductive aqueous electrolyte contact and biasing does produce electroformed conductive filaments, consistent with a requirement for Joule heating to enhance the vacancy concentration and mobility at specific locations in the film.

Thermal Stability of Mixed Cation Metal Halide Perovskites in Air

We study the thermal stability in air of the mixed cation organic-inorganic lead halide perovskites Cs0.17FA0.83Pb(I0.83Br0.17)3 and Cs0.05(MA0.17FA0.83)0.95Pb(I0.83Br0.17)3. For the latter compound, containing both MA+ and FA+ ions, thermal decomposition of the perovskite phase was observed to occur in two stages. The first stage of decomposition occurs at a faster rate compared to the second stage and is only observed at relatively low temperatures (T < 150 °C). For the second stage, we find that both decomposition rate and the activation energy have similar values for Cs0.05(MA0.17FA0.83)0.95Pb(I0.83Br0.17)3 and Cs0.17FA0.83Pb(I0.83Br0.17)3, which suggests that the first stage mainly involves reaction of MA+ and the second stage mainly FA+.

Contact Selectivity Engineering in a 2 μm Thick Ultrathin c-Si Solar Cell Using Transition-Metal Oxides Achieving an Efficiency of 10.8%

In this paper, the integration of metal oxides as carrier-selective contacts for ultrathin crystalline silicon (c-Si) solar cells is demonstrated which results in an ∼13% relative improvement in efficiency. The improvement in efficiency originates from the suppression of the contact recombination current due to the band offset asymmetry of these oxides with Si. First, an ultrathin c-Si solar cell having a total thickness of 2 μm is shown to have >10% efficiency without any light-trapping scheme. This is achieved by the integration of nickel oxide (NiOx) as a hole-selective contact interlayer material, which has a low valence band offset and high conduction band offset with Si. Second, we show a champion cell efficiency of 10.8% with the additional integration of titanium oxide (TiOx), a well-known material for an electron-selective contact interlayer. Key parameters including Voc and Jsc also show different degrees of enhancement if single (NiOx only) or double (both NiOx and TiOx) carrier-selective contacts are integrated. The fabrication process for TiOx and NiOx layer integration is scalable and shows good compatibility with the device.

Interfacial Cation-Defect Charge Dipoles in Stacked TiO2/Al2O3 Gate Dielectrics

Layered atomic-layer-deposited and forming-gas-annealed TiO2/Al2O3 dielectric stacks, with the Al2O3 layer interposed between the TiO2 and a p-type germanium substrate, are found to exhibit a significant interface charge dipole that causes a ∼-0.2 V shift of the flat-band voltage and suppresses the leakage current density for gate injection of electrons. These effects can be eliminated by the formation of a trilayer dielectric stack, consistent with the cancellation of one TiO2/Al2O3 interface dipole by the addition of another dipole of opposite sign. Density functional theory calculations indicate that the observed interface-dependent properties of TiO2/Al2O3 dielectric stacks are consistent in sign and magnitude with the predicted behavior of AlTi and TiAl point-defect dipoles produced by local intermixing of the Al2O3/TiO2 layers across the interface. Evidence for such intermixing is found in both electrical and physical characterization of the gate stacks.

Electrochemical impedance spectroscopy for quantitative interface state characterization of planar and nanostructured semiconductor-dielectric interfaces.

The performance of nanostructured semiconductors is frequently limited by interface defects that trap electronic carriers. In particular, high aspect ratio geometries dramatically increase the difficulty of using typical solid-state electrical measurements (multifrequency capacitance- and conductance-voltage testing) to quantify interface trap densities (D it). We report on electrochemical impedance spectroscopy (EIS) to characterize the energy distribution of interface traps at metal oxide/semiconductor interfaces. This method takes advantage of liquid electrolytes, which provide conformal electrical contacts. Planar Al2O3/p-Si and Al2O3/p-Si0.55Ge0.45 interfaces are used to benchmark the EIS data against results obtained from standard electrical testing methods. We find that the solid state and EIS data agree very well, leading to the extraction of consistent D it energy distributions. Measurements carried out on pyramid-nanostructured p-Si obtained by KOH etching followed by deposition of a 10 nm ALD-Al2O3 demonstrate the application of EIS to trap characterization of a nanostructured dielectric/semiconductor interface. These results show the promise of this methodology to measure interface state densities for a broad range of semiconductor nanostructures such as nanowires, nanofins, and porous structures.

Ge Nanowires: Sn Catalysts and Ge/Ge1-xSnx Core-Shell Structures

Characterization of Ge nanowire formation by vapor-liquid-solid (VLS) growth, using Au as the catalyst, has been shown to facilitate non-equilibrium processes such as low-temperature growth of Ge nanowires below the Ge-Au eutectic temperature, and formation of metastable structures and compositions in the catalysts [1-5]. Non-equilibrium growth also offers possibilities for metastable solute trapping of other components in the nanowire. Here we show results for the Ge/Sn system, using Sn as either the catalyst for Ge NW growth, or to form a Ge/Ge1-xSnx core-shell nanowire. Incorporating Sn into the nanowires offers the possibility of increasing the carrier mobility, and of achieving a direct band-gap for efficient light absorption and emission by pushing the concentration of Sn in Ge beyond the equilibrium value [6]. Fig. 1 shows the morphology and single crystallinity of nanowires grown using Sn as the catalyst. The catalyst, formed by evaporation and partial etching of thin Sn layers on Ge substrates, produces wires with typical diameters <10 nm and a <110> growth axis. Many of the nanowires grow without kinking; however the image in Fig. 1 shows that even kinked wires are single crystal. Nanowires that are grown using Au catalysts, with Sn added via the introduction of SnCl4 gas partway through the growth process to form core-shell structures, are shown in Fig. 2. Sn is incorporated into the liquid catalyst droplet, which enlarges the catalyst and the nanowire diameter. During end-of-growth cool-down Sn and Ge are rejected from the catalyst resulting in tapered ends, with Au remaining at the tip. These nanowires have a <111> growth axis; they contain planar defects in the lower half of the wire as shown in the STEM image of Fig. 3, whereas the upper half of the wires are defect free. The planar defects are particularly visible in the left wire, which is tilted to a <110> orientation. Figure 4 shows high resolution aberration corrected images of the defects. These defects, which sometime appear as a single plane, do not appear to be stacking faults as there is no shift of the intersecting (111) planes across the defect; their structure is being investigated further. Preliminary EDS analysis of the shell composition indicates a Sn concentration of ~4 at%, well above the <1 at% equilibrium value, and possible further accumulation of Sn at the planar defects. We are currently investigating the growth parameters needed to achieve higher Sn concentrations while minimizing defects, and will also report on photoluminescence measurements of the nanowires [7, 8].