Kedar Chitnis

High Performance Front Camera ADAS Applications on TI's TDA3X Platform

Advanced driver assistance systems (ADAS) are designed to increase drivers situational awareness and road safety by providing essential information, warning and automatic intervention to reduce the possibility/severity of an accident. Of the various types of ADAS modalities available, camera based ADAS are being widely adopted for their usefulness in varied applications, overall reliability and adaptability to new requirements. But camera based ADAS also represents a complex, high-performance, and low-power compute problem, requiring specialized solutions. This paper introduces a high performance front camera ADAS based on a small area, low power System-on-Chip (SoC) solution from Texas Instruments called Texas Instruments Driver Assist 3x (TDA3x). The paper illustrates compute capabilities of the device in implementation of a typical front camera ADAS. The paper also introduces key programming concepts related to heterogeneous programmable compute cores in the SoC and the software framework to use those cores in order to develop the front camera solutions. These aspects will be of interest not only to the ADAS developers but for computer vision and compute intensive embedded system development.

A Diverse Low Cost High Performance Platform for Advanced Driver Assistance System (ADAS) Applications

Advanced driver assistance systems (ADAS) are becoming more and more popular. Lot of the ADAS applications such as Lane departure warning (LDW), Forward Collision Warning (FCW), Automatic Cruise Control (ACC), Auto Emergency Braking (AEB), Surround View (SV) that were present only in high-end cars in the past have trickled down to the low and mid end vehicles. Lot of these applications are also mandated by safety authorities such as EUNCAP and NHTSA. In order to make these applications affordable in the low and mid end vehicles, it is important to have a cost effective, yet high performance and low power solution. Texas Instruments (TIs) TDA3x is an ideal platform which addresses these needs. This paper illustrates mapping of different algorithms such as SV, LDW, Object detection (OD), Structure From Motion (SFM) and Camera-Monitor Systems (CMS) to the TDA3x device, thereby demonstrating its compute capabilities. We also share the performance for these embedded vision applications, showing that TDA3x is an excellent high performance device for ADAS applications.

Efficient object detection and classification on low power embedded systems

Identifying real world 3D objects such as pedestrians, vehicles and traffic signs using 2D images is a challenging task. There are multiple approaches to tackle this problem with varying degree of detection accuracy and implementation complexity. Some approaches use “hand coded” object features such as Histogram of Oriented Gradients (HOG), Haar, Scale Invariant Feature Transform (SIFT) along with a linear classifier such as Support Vector Machine (SVM), Adaptive Boosting (AdaBoost) to detect objects. Recent developments have shown that a deep multi-layered Convolution Neural Network (CNN) classifier can learn the object features on its own and also classify at an accuracy surpassing human vision. In this paper we combine both the approaches; “object detection” is done using HOG features and AdaBoost cascade classifier and “object classification” is done using CNN to classify the type of objects being detected. The proposed method is implemented on TIs low power TDA3x SoC.

Boot time optimization techniques for automotive rear view camera systems

Upon engaging the reverse gear in the car, very first information driver needs to know, whether is it really safe to take the reverse? Blind spots in car that result in rear view obstruction make this difficult. Advanced Driver Assistance Systems (ADAS) equip drivers with an application - Rear View Camera Systems (RVCS) to resolve this. There are simple RVCS which just show the rear view on the display or intelligent ones that run Object Detection (OD) algorithms on the captured video and flash warnings for drivers. In both cases, the boot time of the system is very crucial for safety as well as overall user experience, it is always annoying to wait for system to boot up. In autonomous cars the OD result is considered to make decisions, so thats even more safety critical. In short, the challenge is not only to boot within few milliseconds but get entire application working within short time. Heavy initialization time of subsystems involved make it tricky to achieve this at application level. This paper focuses on optimization techniques applied to similar RVCS. Boot time less than 500 milliseconds can be achieved using these techniques. These are also scalable to all fast boot ADAS solutions trying to achieve stringent boot time goals in order to ensure safety and improvise on this subtle user experience.

High performance automotive radar signal processing on TI's TDA3X platform

Automotive is an important application of radar. In collision avoidance applications, radar and camera are two main sensors with radar having a healthy share [16]. Usage of radar in the automotive space is expanding beyond range and velocity detection of obstacles to more sophisticated usage of object motion direction estimation [17], precise angular position estimation of obstacles in urban environments [6][7] and ground vehicle localization[15]. As a result, radar processing solutions require complex signal processing with higher programmability. In this paper, we explain the mapping of automotive MIMO radar processing chain on TIs TDA3x platform and highlight the need for a heterogeneous processor architecture with adequate programmability.

A 216 GOPS flexible WDR Image Processor for ADAS SoC

Advanced Driver Assistance Systems (ADAS) enhance the ability of a vehicle driver to avoid possible road accidents resulting in a safer driving experience. Front camera ADAS is probably the most challenging of all. These systems require high computational processing, in the range of hundreds of GOPS, within a 4 Watt power budget driven by thermal constraints of small enclosed assembly of the final system. In this paper, we present, Wide Dynamic Image (WDR or HDR) Processor as part of the Imaging Sub-system (ISS) that is flexible to interface with various kinds of optical sensor across different manufactures. The design achieves an overall throughput of 216 GOPS with performance efficiency of 66.4 GOPS/mm2 and power efficiently of 1.8 TOPS/W.

Thermal safety through Limp Home Mode for intelligent Rear View Camera Systems

Multiprocessor SoCs (MPSoCs) are deployed in intelligent Rear View Camera Systems (iRVCS) for capture, analytics and display. iRVCS, mounted near the cars exterior surface, are subject to direct sunlight for prolonged time. At high junction temperatures (Tj) iRVCS completely shuts down for thermal protection resulting in complete loss of visibility. The paper focuses on techniques to detect such conditions and switch to a Limp Home Mode (LHM) with basic rear view visibility. When Tj reduces, it seamlessly switches back to original usecase. Results showed the switch takes <; 350 milliseconds achieving 20-25% power savings (5°C cooler) at high ambient temperatures.

Image signal processing for front camera based automated driver assistance system

Advanced driver assistance systems (ADAS) are designed to increase drivers situational awareness and road safety by providing essential information, warning and automatic intervention to reduce the possibility/severity of an accident. Front Camera (FC) based ADAS system uses computer vision based techniques to detect obstacles (e.g. pedestrian, cyclist etc) on road from captured image. Typical Image Signal Processing (ISP) is developed to cater cellphones and Digital Still Cameras (DSC) for purpose of human viewing unlike computer vision algorithms whose purpose is to help driver. The given paper explains typical sensor as well as ISP requirements for FC systems deployed in ADAS along with difference compared to cellphones and DSC. The paper proposes typical ISP pipeline which is tuned for computer vision (CV) application. The proposed solution is different in terms of input and output format & bit-depth, processing needs, actual processing algorithm, safety, temperature and thermal constraints. The proposed ISP pipeline is simulated on PC and can be enabled by means of mix of hardware and software on TIs Driver Assistance (TDA) series of processors.

Network stack optimization techniques for Multichannel Network Video Receivers

Multichannel Network Video Receiver (NVR) is the counter part for Internet Protocol Network Camera (IPNC). Increasing demand of IPNCs for surveillance purpose in turn imposes need to have more NVRs. Traditionally, NVRs are Personal Computer (PC) based applications but there are multi-core System On Chips (SOC)s available in market which can provide much cheaper solutions for this application. For these low cost and low power multi-core SOCs, it is highly likely that most of the Central Processing Unit (CPU) cycles of the master processor are spent in receiving the data over network. In order to receive video data over network with minimum possible cycles spent, the entire network stack needs to be optimized from network receive (RX) perspective. The paper focuses on various efficient techniques for network stack optimization, those can be applied to UNIX based NVR systems. Few of the optimizations described here are very easy to implement and can be implemented without actually changing anything in the source code of application. Experiments carried out using these optimization techniques demonstrate how humongous gain in CPU cycles is obtained for multichannel NVR systems and quantifies the same through exceptional results.