Kengo Nozaki

Ultralow Operating Energy Electrically Driven Photonic Crystal Lasers

The introduction of the photonic crystal (PhC) wavelength-scale cavity as a laser cavity enables us to obtain both ultralow threshold current and operating energy. These parameters are essential when using the transmitters in chip-to-chip and on-chip interconnections. To improve the device performance, we employ an ultracompact embedded active region that we call a lambda-scale embedded active-region PhC laser or LEAP laser. We have developed an electrically driven LEAP laser, which operates under room-temperature continuous-wave conditions. To fabricate the electrically driven LEAP laser, we used Zn thermal diffusion and Si ion implantation, respectively, for p-type and n-type doping in an undoped InP layer. However, with previous fabricated devices there was a large leakage current through the substrate and the threshold current was 0.39 mA, which is larger than the expected threshold obtained by optical pumping. To reduce the leakage current, we propose using an InAlAs sacrificial laser instead of an InGaAs layer. The leakage current path through the substrate is effectively suppressed, and as a result, the threshold current is reduced to 7.8 μA, which is the lowest threshold current reported for any laser. Furthermore, the LEAP laser operates at up to 95 °C by using an InGaAlAs-based multiple quantum well structure. We also describe the dynamic characteristics of the laser. The LEAP laser exhibits a maximum 3-dB bandwidth of 16.2 GHz and the modulation current efficiency factor is 53.8 GHz/mA0.5 or 1.7 GHz/μA0.5, which is four times that of a vertical cavity surface-emitting laser. The device is directly modulated by a 12.5-Gb/s nonreturn-to-zero signal with a bias voltage of 1.6 V and a bias current of 109 μA, resulting in an energy cost of 14.0 fJ/b. This is the smallest operating energy for any laser. These results indicate that the LEAP laser is highly suitable for use as a transmitter in computercom applications.

Deep-subwavelength plasmonic mode converter with large size reduction for Si-wire waveguide

If we are to utilize deep-subwavelength plasmonic waveguides in photonic integrated circuit applications, highly efficient three-dimensional (3D) mode conversion must be achieved between deep-subwavelength plasmonic waveguides and conventional dielectric waveguides such as Si-wire waveguides. Here, we describe 3D mode conversion from a Si-wire waveguide (the core size is 400u2009u2009nm×200u2009u2009nm) to a plasmonic slot waveguide (the air core size is 50u2009u2009nm×20u2009u2009nm) with a coupling loss of 1.7 dB. Our mode converter has only a two-dimensional laterally tapered structure even with the presence of a large discontinuity in the thickness, and can still produce efficient full 3D mode conversion with a very short taper length (600 nm). Calculation results obtained with the finite element method agreed well with the experimental results. We believe our mode converter will provide a new deep-subwavelength photonic platform.

Coherent control of high efficiency metasurface beam deflectors with a back partial reflector

Recently, coherent control of absorption in metallic metasurfaces has been demonstrated, and this phenomenon was applied to intriguing light-by-light switching operation. Here we experimentally demonstrate coherent control of beam deflection by high-efficiency metasurfaces for the first time. Although the beam deflection efficiency by a metasurface is generally small, high-efficiency metasurfaces, which consist of a single layer metasurface with a back reflector, are known to exhibit significantly high deflection efficiency. A key point of our study is to replace the back reflector with a partial reflector instead, which enables light-by-light control of a high-efficiency metasurface with a pair of counter-propagating coherent beam inputs. By adjusting the partial reflector thickness appropriately, the proposed device outperforms ones without a reflector, especially for the deflection efficiency. We finally experimentally demonstrate the expected operation of the fabricated device at a visible wavelength,...

All-optical RAM buffer subsystem demonstrator

A comprehensive R&D program aiming at all-optical RAM buffer subsystem for optical packet switching will be presented, featuring nano-cavity based optical bit memory, a unique beam addressing optics, and optical SP and PS converters.

Demonstration of photonic digital-to-analog conversion (DAC) utilizing a single silicon Mach-Zehnder modulator (Conference Presentation)

Digital-to-analog converters (DAC) are indispensable functional units in optical signal transmission and processing. The photonic DAC that converts electrical digital signals to an optical analog one will offer advantages in lowering system complexity, power, and cost. Especially with the required bandwidth increasing, it could mitigate the problems faced by its electrical counterparts in dealing with higher sampling rate. Achieving such a photonic DAC in silicon photonics is promising due to the integration capability of both electronics and photonics and large scale DAC-based photonic circuits can be further realized for on-chip optical signal processing. In this work, we demonstrate 2-bit D/A conversion for the simple proof of concept utilizing only one single silicon Mach-Zehnder modulator (MZM), which is much simpler than previously reported segmented MZM and microring resonator based DACs. One-single MZM capable of 2-bit DAC merits future higher bit resolution design and meanwhile guarantees wide spectral bandwidth. One arm of MZM is used for the MSB bit input, while the other for the LSB, both of them being accomplished by only one phase shifter. For each bit input, we utilize amplitude modulation, instead of phase modulation, by applying the carrier injection induced absorption in the phase shifters. For principle, by setting different bias points for two phase shifters, we can produce the condition at which the amplitude weighting ratio of LSB to MSB is 1/2 in order to obtain the linear amplitude DAC output. In other words, the output optical field has the analog linear amplitude levels (0,1,2,3) which corresponds to the power levels of (0,1,4,9) at the full extinction condition. For fabrication, this device was fabricated on a 220-nm SOI wafer with a 3-uf06dm buried-oxide layer at the AIST SCR 300-mm CMOS foundry. The 430-nm-wide fully etched channel waveguide was used for the components except for the pn phase shifter which adopted the shallow-etched rib waveguide structure with a slab thickness of about 110 nm and a width of about 600 nm. The doping density in the weak p/n regions was about 1.6uf0b41018 cm-3. This MZM was arm-balanced with 2-mm-long phase shifters, adopting GSGSG configuration. Two 50-uf057 terminators were also integrated on-chip at the ends of two signal electrodes. For measurement, a two-channel pulse pattern generator produced bit sequences at various frequencies for both MSB and LSB which was applied to the signal electrodes through bias-tees and high-speed probes. The 1.55-uf06dm cw light at TE polarization was coupled into the chip via a tapered fiber and the optical output passed an EDFA and a bandpass filter and then was sent to a high-speed oscilloscope for examining DAC analog output. Using this device, we successfully achieved correct D/A conversions with the sampling rates up to 3 GS/s with <1 V peak-to-peak voltages. Note that this speed can be further enhanced to <10 GS/s by constructing the pn phase shifter into a MZM structure or replacing it with a SiGe electro-absorption modulator. In summary, this work verified the feasibility to realize high-sampling-rate 2-bit D/A conversion utilizing a single silicon MZM modulator.

Low-latency optical parallel adder based on a binary decision diagram with wavelength division multiplexing scheme

We propose an optical parallel adder based on a binary decision diagram that can calculate simply by propagating light through electrically controlled optical pass gates. The CARRY and CARRY operations are multiplexed in one circuit by a wavelength division multiplexing scheme to reduce the number of optical elements, and only a single gate constitutes the critical path for one digit calculation. The processing time reaches picoseconds per digit when we use a 100-μm-long optical path gates, which is ten times faster than a CMOS circuit.

Forward-biased nanophotonic detector for ultralow-energy dissipation receiver

Generally, reverse-biased photodetectors (PDs) are used for high-speed optical receivers. The forward voltage region is only utilized in solar-cells, and this photovoltaic operation would not be concurrently obtained with high efficiency and high speed operation. Here we report that photonic-crystal waveguide PDs enable forward-biased high-speed operation at 40 Gbit/s with keeping high responsivity (0.88 A/W). Within our knowledge, this is the first demonstration of the forward-biased PDs with high responsivity. This achievement is attributed to the ultracompactness of our PD and the strong light confinement within the absorber and depleted regions, thereby enabling efficient photo-carrier generation and fast extraction. This result indicates that it is possible to construct a high-speed and ultracompact photo-receiver without an electrical amplifier nor an external bias circuit. Since there is no electrical energy required, our estimation shows that the consumption energy is just the optical energy of the injected signal pulse which is about 1 fJ/bit. Hence, it will lead to an ultimately efficient and highly integrable optical-to-electrical converter in a chip, which will be a key ingredient for dense nanophotonic communication and processors.Generally, reverse-biased photodetectors (PDs) are used for high-speed optical receivers. The forward voltage region is only utilized in solar-cells, and this photovoltaic operation would not be concurrently obtained with high efficiency and high speed operation. Here we report that photonic-crystal waveguide PDs enable forward-biased high-speed operation at 40 Gbit/s with keeping high responsivity (0.88 A/W). Within our knowledge, this is the first demonstration of the forward-biased PDs with high responsivity. This achievement is attributed to the ultracompactness of our PD and the strong light confinement within the absorber and depleted regions, thereby enabling efficient photo-carrier generation and fast extraction. This result indicates that it is possible to construct a high-speed and ultracompact photo-receiver without an electrical amplifier nor an external bias circuit. Since there is no electrical energy required, our estimation shows that the consumption energy is just the optical energy of th...

17-Gb/s direct modulation of lambda-scale embedded active region photonic crystal lasers

We demonstrated the direct modulation of photonic-crystal nanocavity lasers to realize on-chip optical interconnects. A maximum 3-dB bandwidth of 16.2 GHz was obtained. We achieved a 17-Gb/s eye opening with a 35.3-fJ/bit energy cost.

Integrable ultralow-power nanophotonic devices on InP photonic crystals

Photonic crystal nanocavities are expected to greatly reduce the size and energy consumption of various optical devices. We have demonstrated this feature in all-optical switches and random access memories for on-chip nanophotonic integration.