Kenneth A. Parulski
Eastman Kodak Company
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Featured researches published by Kenneth A. Parulski.
international solid-state circuits conference | 1989
Lionel J. D'Luna; Kenneth A. Parulski; T.J. Kenney; R.H. Hibbard; R.M. Guidash; P.R. Shelley; W.A. Cook; G.W. Brown; Timothy J. Tredwell
The authors describe signal processor (DSP) for CCD (charge-coupled-device) cameras using a specified color filter array pattern. A block diagram of the DSP chip is shown. The chip has been designed and fabricated in a 2- mu m single-poly double-metal CMOS process. Eight scan-test registers were used at selected points in the processing chain to enable the entire chip to be tested, including ROMs and line delays, with 16 k vectors. The chip is functional at a maximum clock rate of 14.3 MHz. An image processed by the device is shown. The data path is designed with simple ripple-carry adders and dynamic registers. The on-chip programmable delay lines and 14.3-MHz clock-rate allow the chip to accommodate sensors for up to 768 active pixels, making it suitable for NTSC, CCIR 601 and PAL video standards.<<ETX>>
IEEE Transactions on Consumer Electronics | 1989
Kenneth A. Parulski; Lionel J. D'Luna; Robert H. Hibbard
The authors describe a prototype digital imaging system that can be configured as a single-sensor video camera or a film-to-video converter. The system includes a CCD (charge-coupled device) image sensor with a 3G color filter pattern, two full-custom CMOS digital video signal processing chips, and a custom electronically programmable sequencer chip. The CMOS VLSI digital circuits offer real-time operation while meeting the size, power, and cost constraints of one-chip cameras and fill-to-video converters. System timing and design methodology are discussed. >
Solid State Sensor Arrays and CCD Cameras | 1996
Kenneth A. Parulski; Peter H. Jameson
This paper describes the technology used in a new generation of digital cameras. The cameras all use full-frame image sensors optimized for producing still images in electronic cameras. The color CCDs incorporate the Bayer color filter array pattern, lateral overflow drain antiblooming protection, accumulation mode timing, and progressive scan readout. The three cameras described have CCDs with 6.3 million, 1.6 million, and 400 thousand pixels, with 9 micron square pixels and a 3:2 image aspect ratio. They use a firmware-based digital camera architecture to maximize flexibility and image quality. Extensive digital image processing is performed in the host computer, as the images are downloaded from the camera. This enables the cameras to use sophisticated image processing algorithms that can be easily upgraded in the field and customized for special customer applications.
custom integrated circuits conference | 1989
Lionel J. D'Luna; Kenneth A. Parulski; D.C. Maslyn; M.A. Hadley; T.J. Kenney; R.H. Hibbard; R.M. Guidash; P.P. Lee; C.N. Anagnostopoulos
A description is given of a digital-video-signal postprocessing chip (DSPP) developed for use with one-chip color video image sensors. The chip improves the image quality of reconstructed RGB data by performing black-level adjustment, color correction matrixing, gamma correction, and edge enhancement. It contains 115000 transistors in a 11.5 mm×11.2 mm die area and was designed using a silicon compiler in a 2-μm die area and was designed using a silicon compiler in a 2-μm CMOS process. It can be used in NTSC, CCIR 601, and PAL/SECAM video systems
custom integrated circuits conference | 1990
William A. Cook; Kenneth A. Parulski; Lionel J. D'Luna; G.W. Brown; R.M. Guidash
A 132 K transistor device which performs black-level, gain, and defect corrections, line-rephasing, color matrixing, and curve-shaping functions on linear sensor data while interfacing to external memory and a data bus is described. The 2 mu m CMOS chip can be used with a wide range of sensor resolutions for various image-scanning applications. The chip performs the following functions: digital correlated double sampling, black-level correction and gain correction for each photosite, sensor defect concealment, color matrixing, and look-up table operations for space transformations. Additionally, three interface circuits are implemented to store and retrieve black-level and gain correction values, rephase red, green, and blue values to provide line coincidence, and function as a simple computer for loading coefficients and writing the processed image data.<<ETX>>
Cameras and Systems for Electronic Photography and Scientific Imaging | 1995
Raymond J. Bouvy; John Vincent; Kenneth A. Parulski; Kris S. Balch; Gary L. Erickson
A high speed CCD camera system has been developed for commercial, industrial, and scientific applications. The system incorporates two video channels, each capable of running at rates up to 20 million pixels/second. The output of each channel is digitized to provide true 8-bit output signals. The camera offers high linearity, low noise, wide dynamic range, and low shading. The camera can be used in a range of applications, including medical, industrial inspection, microscopy, and surveillance.
Archive | 1995
Kamal K Sarbadhikari; John R. Fredlund; Kenneth A. Parulski
Archive | 1995
Kenneth A. Parulski; Thomas Anthony Napoli; David M. Lewis
Archive | 2000
Kenneth A. Parulski; John R. McCoy
Archive | 2003
Elena A. Fedorovskaya; Serguei Endrikhovski; Tomasz A. Matraszek; Kenneth A. Parulski; Carolyn A. Zacks; Karen M. Taxier; Michael J. Telek; Frank Marino; Dan Harel