Kenneth W. Moulding

Gyrator video filter IC with automatic tuning

A bipolar chip (11mm2) filter separating the luminance, chrominance, teletext and sound signals in a TV receiver, operating at frequencies up to 6MHz, will be reported.

S/sup 2/I: a two-step approach to switched-currents

The principal causes of nonideal behavior which degrade precision and linearity in switched-current circuits, and the circuit techniques which are frequently applied to suppress them, are reviewed. These techniques include the use of negative feedback to reduce errors resulting from channel-length modulation and capacitive feedback, and fully-differential circuits with charge cancellation to reduce switch charge injection. It is argued that this piecemeal application of circuit techniques to suppress individual errors frequently carries penalties for silicon area, power dissipation, bandwidth and low supply voltage operation. An alternative approach is presented which attempts to enhance basic cell performance through successive refinement of the memorized sample. This is achieved in a two-step technique, called S/sup 2/ I, in which the input sample is coarsely memorized, a process which introduces a combination of all the normal errors, followed by detection and suppression of the combined errors. The circuit solution requires the addition to the basic memory cell of only two extra switches. The new cell carries little or none of the aforementioned penalties.<<ETX>>

Automated design of switched-current filters

This paper describes the automated design and synthesis of switched-current (SI) filters using SCADS, a flexible CAD system integrated in a major VLSI design suite. With this system, the nonspecialist can produce high performance analog filters suitable for mixed signal CMOS ICs fabricated using only standard digital processes. To achieve high levels of performance on silicon, filter designs are realized using an enhanced differential circuit technique (S/sup 2/I) in its integrators and sample-and-hold cells. The design system is described in terms of the embedded circuits, its integrated tool set, the filter design flow and the engineering procedures for ensuring reliable circuit operation. Examples of high performance video frequency filters are presented, each generated automatically by SCADS within one day. Fabricated in a 0.8 /spl mu/m standard CMOS process, they demonstrate state-of-the-art performance.

An 8 MHz, 80 Ms/s switched-current filter

Since its introduction in 1989, the switched-current (SI) technique for sampled-data signal processing has claimed the advantage over switched-capacitors of needing only digital CMOS processing, making it cheaper and more amenable to mixed-signal ICs. Attempts to raise the performance to match that of switched-capacitors has had mixed success, and some silicon implementations have been reported. A recent advance, called S/sup 2/I, promises the highest overall performance yet. This paper demonstrates that switched current filters can not only compete with switched-capacitors and use simpler IC processing but also perform well with sampling frequencies of at least 80 MHz.<<ETX>>

A switched-current double sampling bilinear z-transform filter technique

A filter technique, based on an integrator/summer which performs the bilinear z-transform and achieves two samples per clock period, is described. The operation of the integrator/summer is analysed and this is supported by simulation. As an example, a 3rd order lowpass elliptic ladder filter is designed. Measurement of an IC designed for a cut-off frequency of 8 MHz with sampling at 80 MHz confirm the technique and indicate that operation at sample frequencies beyond 100 MHz is feasible.<<ETX>>

Enhanced S/sup 2/I switched-current cells

Enhancements to the basic S/sup 2/I memory cell are presented. These include techniques for compensating the output switches, neutralisation of the feedback capacitances and for improved settling behaviour. The techniques carry minimal penalty for design trade-offs and have enabled design automation of high performance circuits up to video frequencies, using a standard 3.3 V CMOS process.

Switched-current Video Signal Processing

The switched-current (SI) technique is ideally suited to mixed analogue/digital ICs implemented in standard digital VLSI CMOS processing. This chapter builds on previous chapters, developing the technique to enable engineering of video frequency signal processors.

Switched-current cells for design automation

A family of switched-current cells is presented based on the S/sup 2/I memory cell and balanced circuit configurations which are highly suitable for design automation. Core functions of sample-and-hold, and bilinear integration and differentiation are described and simulated.

Error neutralisation in switched current memory cells

This paper demonstrates that high performance operation of switched-current memory cells can be achieved by neutralisation of the cells errors using gate-drain capacitive feedback. Simulation indicates that this technique can achieve 9-10 bit performance at a sampling frequency of 100 MS/s.

Recent Advances in Switched-Current Filters

Two recent advances in the switched-current filter technique are reported. The first is an improved memory cell which brings enhanced performance while avoiding many of the trade-offs of earlier attempts. The second is an improved integrator structure which has both better performance and lower power dissipation. The techniques are demonstrated in an 8MHz, 80Msample/s 3rd order lowpass elliptic ladder filter implemented in a standard CMOS process. IC measurements confirm performance which competes with the best of switched-capacitor filters.