Khaled N. Salama

Memristor-based memory

In this paper, we investigate the read operation of memristor-based memories. We analyze the sneak paths problem and provide a noise margin metric to compare the various solutions proposed in the literature. We also analyze the power consumption associated with these solutions. Moreover, we study the effect of the aspect ratio of the memory array on the sneak paths. Finally, we introduce a new technique for solving the sneak paths problem by gating the memory cell using a three-terminal memistor device.

Microscale electrostatic fractional capacitors using reduced graphene oxide percolated polymer composites

We show that graphene-percolated polymer composites exhibit fractional capacitance response in the frequency range of 50 kHz–2 MHz. In addition, it is shown that by varying the loading of graphene within the matrix from 2.5% to 12%, the phase can be controllably tuned from −67° to −31°, respectively. The electrostatic fractional capacitors proposed herein are easy to fabricate and offer integration capability on electronic printed circuit boards.

The fractional-order modeling and synchronization of electrically coupled neuron systems

In this paper, we generalize the integer-order cable model of the neuron system into the fractional-order domain, where the long memory dependence of the fractional derivative can be a better fit for the neuron response. Furthermore, the chaotic synchronization with a gap junction of two or multi-coupled-neurons of fractional-order are discussed. The circuit model, fractional-order state equations and the numerical technique are introduced in this paper for individual and multiple coupled neuron systems with different fractional-orders. Various examples are introduced with different fractional orders using the non-standard finite difference scheme together with the Grunwald-Letnikov discretization process which is easily implemented and reliably accurate.

On the mathematical modeling of memristors

Since the fourth fundamental element (Memristor) became a reality by HP labs, and due to its huge potential, its mathematical models became a necessity. In this paper, we provide a simple mathematical model of Memristors characterized by linear dopant drift for sinusoidal input voltage, showing a high matching with the nonlinear SPICE simulations. The frequency response of the Memristors resistance and its bounding conditions are derived. The fundamentals of the pinched i-v hysteresis, such as the critical resistances, the hysteresis power and the maximum operating current, are derived for the first time.

Passive and Active Elements Using Fractional

This paper introduces a qualitative revision of the traditional LC tank circuit in the fractional domain. The paper can be divided into six major parts, aiming in turn to establish the various conditions under which LβCα impedance may act as a resistor, negative resistor, or a positive or negative pure imaginary inductor or capacitor, in accordance to new frequency definitions; illustrate the process by which the phase response chooses the shortest path from initial to final phase, and use this illustration to verify the cases discussed in part one; develop the generalized parameters for the bandpass filter response of the LβCα circuit, such as the resonance frequency and quality factor versus α- β plane; discuss sensitivity analyses with respect to the fractional orders, as well as the time domain analyses for the impulse and step responses with their analytical formulas; and lastly, to propose some possible applications for this generalized circuit. Mathematical and PSpice simulation results are included to validate the discussion.

{\rm L}_{\beta} {\rm C}_{\alpha}

This paper introduces several novel active RC oscillator circuits using the operational transresistance amplifier (OTRA) as the basic active building block. A general configuration using a single OTRA is introduced, from which a minimum component oscillator is generated. Four new oscillator circuits based on using two OTRAs are reported. HSpice simulations to confirm the analysis are given.

Circuit

Fractional order circuit elements (inductors and capacitors) based impedance matching networks are introduced for the first time. In comparison to the conventional integer based L-type matching networks, fractional matching networks are much simpler and versatile. Any complex load can be matched utilizing a single series fractional element, which generally requires two elements for matching in the conventional approach. It is shown that all the Smith chart circles (resistance and reactance) are actually pairs of completely identical circles. They appear to be single for the conventional integer order case, where the identical circles completely overlap each other. The concept is supported by design equations and impedance matching examples.

Novel oscillators using the operational transresistance amplifier

This paper discusses the continuous effect of the fractional order parameter of the Lü system where the system response starts stable, passing by chaotic behavior then reaching periodic response as the fractional-order increases. In addition, this paper presents the concept of synchronization of different fractional order chaotic systems using active control technique. Four different synchronization cases are introduced based on the switching parameters. Also, the static and dynamic synchronizations can be obtained when the switching parameters are functions of time. The nonstandard finite difference method is used for the numerical solution of the fractional order master and slave systems. Many numeric simulations are presented to validate the concept for different fractional order parameters.

Theory of Fractional Order Elements Based Impedance Matching Networks

The paper describes a bioluminescence detection lab-on-chip consisting of a fiber-optic faceplate with immobilized luminescent reporters/probes that is directly coupled to an optical detection and processing CMOS system-on-chip (SoC) fabricated in a 0.18-/spl mu/m process. The lab-on-chip is customized for such applications as determining gene expression using reporter gene assays, determining intracellular ATP, and sequencing DNA. The CMOS detection SoC integrates an 8 /spl times/ 16 pixel array having the same pitch as the assay site array, a 128-channel 13-bit ADC, and column-level DSP, and is fabricated in a 0.18-/spl mu/m image sensor process. The chip is capable of detecting emission rates below 10/sup -6/ lux over 30 s of integration time at room temperature. In addition to directly coupling and matching the assay site array to the photodetector array, this low light detection is achieved by a number of techniques, including the use of very low dark current photodetectors, low-noise differential circuits, high-resolution analog-to-digital conversion, background subtraction, correlated multiple sampling, and multiple digitizations and averaging to reduce read noise. Electrical and optical characterization results as well as preliminary biological testing results are reported.

Control and switching synchronization of fractional order chaotic systems using active control technique

This paper describes the design and very-large-scale integration (VLSI) architecture for a 4 × 4 breadth-first K-best multiple-input-multiple-output (MIMO) decoder using a 64 quadrature-amplitude modulation (QAM) scheme. A novel sort-free approach to path extension, as well as quantized metrics result in a high-throughput VLSI architecture with lower power and area consumption compared to state-of-the-art published systems. Functionality is confirmed via a field-programmable gate array (FPGA) implementation on a Xilinx Virtex II Pro FPGA. Comparison of simulation and measurements are given, and FPGA utilization figures are provided. Finally, VLSI architectural tradeoffs are explored for a synthesized application-specific IC (ASIC) implementation in a 65-nm CMOS technology.